Struct nrf52832_hal::pac::twis0::RegisterBlock
source · #[repr(C)]pub struct RegisterBlock {Show 24 fields
pub tasks_stop: Reg<TASKS_STOP_SPEC>,
pub tasks_suspend: Reg<TASKS_SUSPEND_SPEC>,
pub tasks_resume: Reg<TASKS_RESUME_SPEC>,
pub tasks_preparerx: Reg<TASKS_PREPARERX_SPEC>,
pub tasks_preparetx: Reg<TASKS_PREPARETX_SPEC>,
pub events_stopped: Reg<EVENTS_STOPPED_SPEC>,
pub events_error: Reg<EVENTS_ERROR_SPEC>,
pub events_rxstarted: Reg<EVENTS_RXSTARTED_SPEC>,
pub events_txstarted: Reg<EVENTS_TXSTARTED_SPEC>,
pub events_write: Reg<EVENTS_WRITE_SPEC>,
pub events_read: Reg<EVENTS_READ_SPEC>,
pub shorts: Reg<SHORTS_SPEC>,
pub inten: Reg<INTEN_SPEC>,
pub intenset: Reg<INTENSET_SPEC>,
pub intenclr: Reg<INTENCLR_SPEC>,
pub errorsrc: Reg<ERRORSRC_SPEC>,
pub match_: Reg<MATCH_SPEC>,
pub enable: Reg<ENABLE_SPEC>,
pub psel: PSEL,
pub rxd: RXD,
pub txd: TXD,
pub address: [Reg<ADDRESS_SPEC>; 2],
pub config: Reg<CONFIG_SPEC>,
pub orc: Reg<ORC_SPEC>,
/* private fields */
}
Expand description
Register block
Fields§
§tasks_stop: Reg<TASKS_STOP_SPEC>
0x14 - Stop TWI transaction
tasks_suspend: Reg<TASKS_SUSPEND_SPEC>
0x1c - Suspend TWI transaction
tasks_resume: Reg<TASKS_RESUME_SPEC>
0x20 - Resume TWI transaction
tasks_preparerx: Reg<TASKS_PREPARERX_SPEC>
0x30 - Prepare the TWI slave to respond to a write command
tasks_preparetx: Reg<TASKS_PREPARETX_SPEC>
0x34 - Prepare the TWI slave to respond to a read command
events_stopped: Reg<EVENTS_STOPPED_SPEC>
0x104 - TWI stopped
events_error: Reg<EVENTS_ERROR_SPEC>
0x124 - TWI error
events_rxstarted: Reg<EVENTS_RXSTARTED_SPEC>
0x14c - Receive sequence started
events_txstarted: Reg<EVENTS_TXSTARTED_SPEC>
0x150 - Transmit sequence started
events_write: Reg<EVENTS_WRITE_SPEC>
0x164 - Write command received
events_read: Reg<EVENTS_READ_SPEC>
0x168 - Read command received
shorts: Reg<SHORTS_SPEC>
0x200 - Shortcut register
inten: Reg<INTEN_SPEC>
0x300 - Enable or disable interrupt
intenset: Reg<INTENSET_SPEC>
0x304 - Enable interrupt
intenclr: Reg<INTENCLR_SPEC>
0x308 - Disable interrupt
errorsrc: Reg<ERRORSRC_SPEC>
0x4d0 - Error source
match_: Reg<MATCH_SPEC>
0x4d4 - Status register indicating which address had a match
enable: Reg<ENABLE_SPEC>
0x500 - Enable TWIS
psel: PSEL
0x508..0x510 - Unspecified
rxd: RXD
0x534..0x540 - RXD EasyDMA channel
txd: TXD
0x544..0x550 - TXD EasyDMA channel
address: [Reg<ADDRESS_SPEC>; 2]
0x588..0x590 - Description collection[0]: TWI slave address 0
config: Reg<CONFIG_SPEC>
0x594 - Configuration register for the address match mechanism
orc: Reg<ORC_SPEC>
0x5c0 - Over-read character. Character sent out in case of an over-read of the transmit buffer.