pub struct W(_);
Expand description
Register INTENSET
writer
Implementations
sourceimpl W
impl W
sourcepub fn started(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, STARTED_AW, BitM, 0>
pub fn started(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, STARTED_AW, BitM, 0>
Bit 0 - Write ‘1’ to Enable interrupt for STARTED event
sourcepub fn end(&mut self) -> BitWriterRaw<'_, u32, INTENSET_SPEC, END_AW, BitM, 1>
pub fn end(&mut self) -> BitWriterRaw<'_, u32, INTENSET_SPEC, END_AW, BitM, 1>
Bit 1 - Write ‘1’ to Enable interrupt for END event
sourcepub fn done(&mut self) -> BitWriterRaw<'_, u32, INTENSET_SPEC, DONE_AW, BitM, 2>
pub fn done(&mut self) -> BitWriterRaw<'_, u32, INTENSET_SPEC, DONE_AW, BitM, 2>
Bit 2 - Write ‘1’ to Enable interrupt for DONE event
sourcepub fn resultdone(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, RESULTDONE_AW, BitM, 3>
pub fn resultdone(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, RESULTDONE_AW, BitM, 3>
Bit 3 - Write ‘1’ to Enable interrupt for RESULTDONE event
sourcepub fn calibratedone(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CALIBRATEDONE_AW, BitM, 4>
pub fn calibratedone(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CALIBRATEDONE_AW, BitM, 4>
Bit 4 - Write ‘1’ to Enable interrupt for CALIBRATEDONE event
sourcepub fn stopped(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, STOPPED_AW, BitM, 5>
pub fn stopped(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, STOPPED_AW, BitM, 5>
Bit 5 - Write ‘1’ to Enable interrupt for STOPPED event
sourcepub fn ch0limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH0LIMITH_AW, BitM, 6>
pub fn ch0limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH0LIMITH_AW, BitM, 6>
Bit 6 - Write ‘1’ to Enable interrupt for CH[0].LIMITH event
sourcepub fn ch0limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH0LIMITL_AW, BitM, 7>
pub fn ch0limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH0LIMITL_AW, BitM, 7>
Bit 7 - Write ‘1’ to Enable interrupt for CH[0].LIMITL event
sourcepub fn ch1limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH1LIMITH_AW, BitM, 8>
pub fn ch1limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH1LIMITH_AW, BitM, 8>
Bit 8 - Write ‘1’ to Enable interrupt for CH[1].LIMITH event
sourcepub fn ch1limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH1LIMITL_AW, BitM, 9>
pub fn ch1limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH1LIMITL_AW, BitM, 9>
Bit 9 - Write ‘1’ to Enable interrupt for CH[1].LIMITL event
sourcepub fn ch2limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH2LIMITH_AW, BitM, 10>
pub fn ch2limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH2LIMITH_AW, BitM, 10>
Bit 10 - Write ‘1’ to Enable interrupt for CH[2].LIMITH event
sourcepub fn ch2limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH2LIMITL_AW, BitM, 11>
pub fn ch2limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH2LIMITL_AW, BitM, 11>
Bit 11 - Write ‘1’ to Enable interrupt for CH[2].LIMITL event
sourcepub fn ch3limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH3LIMITH_AW, BitM, 12>
pub fn ch3limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH3LIMITH_AW, BitM, 12>
Bit 12 - Write ‘1’ to Enable interrupt for CH[3].LIMITH event
sourcepub fn ch3limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH3LIMITL_AW, BitM, 13>
pub fn ch3limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH3LIMITL_AW, BitM, 13>
Bit 13 - Write ‘1’ to Enable interrupt for CH[3].LIMITL event
sourcepub fn ch4limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH4LIMITH_AW, BitM, 14>
pub fn ch4limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH4LIMITH_AW, BitM, 14>
Bit 14 - Write ‘1’ to Enable interrupt for CH[4].LIMITH event
sourcepub fn ch4limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH4LIMITL_AW, BitM, 15>
pub fn ch4limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH4LIMITL_AW, BitM, 15>
Bit 15 - Write ‘1’ to Enable interrupt for CH[4].LIMITL event
sourcepub fn ch5limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH5LIMITH_AW, BitM, 16>
pub fn ch5limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH5LIMITH_AW, BitM, 16>
Bit 16 - Write ‘1’ to Enable interrupt for CH[5].LIMITH event
sourcepub fn ch5limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH5LIMITL_AW, BitM, 17>
pub fn ch5limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH5LIMITL_AW, BitM, 17>
Bit 17 - Write ‘1’ to Enable interrupt for CH[5].LIMITL event
sourcepub fn ch6limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH6LIMITH_AW, BitM, 18>
pub fn ch6limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH6LIMITH_AW, BitM, 18>
Bit 18 - Write ‘1’ to Enable interrupt for CH[6].LIMITH event
sourcepub fn ch6limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH6LIMITL_AW, BitM, 19>
pub fn ch6limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH6LIMITL_AW, BitM, 19>
Bit 19 - Write ‘1’ to Enable interrupt for CH[6].LIMITL event
sourcepub fn ch7limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH7LIMITH_AW, BitM, 20>
pub fn ch7limith(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH7LIMITH_AW, BitM, 20>
Bit 20 - Write ‘1’ to Enable interrupt for CH[7].LIMITH event
sourcepub fn ch7limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH7LIMITL_AW, BitM, 21>
pub fn ch7limitl(
&mut self
) -> BitWriterRaw<'_, u32, INTENSET_SPEC, CH7LIMITL_AW, BitM, 21>
Bit 21 - Write ‘1’ to Enable interrupt for CH[7].LIMITL event
Methods from Deref<Target = W<INTENSET_SPEC>>
sourcepub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.