pub struct W(_);
Expand description
Register INTEN
writer
Implementations
sourceimpl W
impl W
sourcepub fn triggered0(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED0_A, BitM, 0>
pub fn triggered0(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED0_A, BitM, 0>
Bit 0 - Enable or disable interrupt for TRIGGERED[0] event
sourcepub fn triggered1(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED1_A, BitM, 1>
pub fn triggered1(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED1_A, BitM, 1>
Bit 1 - Enable or disable interrupt for TRIGGERED[1] event
sourcepub fn triggered2(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED2_A, BitM, 2>
pub fn triggered2(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED2_A, BitM, 2>
Bit 2 - Enable or disable interrupt for TRIGGERED[2] event
sourcepub fn triggered3(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED3_A, BitM, 3>
pub fn triggered3(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED3_A, BitM, 3>
Bit 3 - Enable or disable interrupt for TRIGGERED[3] event
sourcepub fn triggered4(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED4_A, BitM, 4>
pub fn triggered4(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED4_A, BitM, 4>
Bit 4 - Enable or disable interrupt for TRIGGERED[4] event
sourcepub fn triggered5(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED5_A, BitM, 5>
pub fn triggered5(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED5_A, BitM, 5>
Bit 5 - Enable or disable interrupt for TRIGGERED[5] event
sourcepub fn triggered6(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED6_A, BitM, 6>
pub fn triggered6(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED6_A, BitM, 6>
Bit 6 - Enable or disable interrupt for TRIGGERED[6] event
sourcepub fn triggered7(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED7_A, BitM, 7>
pub fn triggered7(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED7_A, BitM, 7>
Bit 7 - Enable or disable interrupt for TRIGGERED[7] event
sourcepub fn triggered8(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED8_A, BitM, 8>
pub fn triggered8(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED8_A, BitM, 8>
Bit 8 - Enable or disable interrupt for TRIGGERED[8] event
sourcepub fn triggered9(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED9_A, BitM, 9>
pub fn triggered9(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED9_A, BitM, 9>
Bit 9 - Enable or disable interrupt for TRIGGERED[9] event
sourcepub fn triggered10(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED10_A, BitM, 10>
pub fn triggered10(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED10_A, BitM, 10>
Bit 10 - Enable or disable interrupt for TRIGGERED[10] event
sourcepub fn triggered11(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED11_A, BitM, 11>
pub fn triggered11(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED11_A, BitM, 11>
Bit 11 - Enable or disable interrupt for TRIGGERED[11] event
sourcepub fn triggered12(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED12_A, BitM, 12>
pub fn triggered12(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED12_A, BitM, 12>
Bit 12 - Enable or disable interrupt for TRIGGERED[12] event
sourcepub fn triggered13(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED13_A, BitM, 13>
pub fn triggered13(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED13_A, BitM, 13>
Bit 13 - Enable or disable interrupt for TRIGGERED[13] event
sourcepub fn triggered14(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED14_A, BitM, 14>
pub fn triggered14(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED14_A, BitM, 14>
Bit 14 - Enable or disable interrupt for TRIGGERED[14] event
sourcepub fn triggered15(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED15_A, BitM, 15>
pub fn triggered15(
&mut self
) -> BitWriterRaw<'_, u32, INTEN_SPEC, TRIGGERED15_A, BitM, 15>
Bit 15 - Enable or disable interrupt for TRIGGERED[15] event
Methods from Deref<Target = W<INTEN_SPEC>>
sourcepub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
pub unsafe fn bits(&mut self, bits: <REG as RegisterSpec>::Ux) -> &mut W<REG>
Writes raw bits to the register.