[−][src]Struct nrf52832_hal::pac::generic::R

pub struct R<U, T> { /* fields omitted */ }

Register/field reader

Result of the read method of a register. Also it can be used in the modify method

Implementations

`impl<U, T> R<U, T> where U: Copy,` [src]

`pub fn bits(&self) -> U`[src]

Read raw bits from register/field

`impl<FI> R<bool, FI>`[src]

`pub fn bit(&self) -> bool`[src]

Value of the field as raw bits

`pub fn bit_is_clear(&self) -> bool`[src]

Returns true if the bit is clear (0)

`pub fn bit_is_set(&self) -> bool`[src]

Returns true if the bit is set (1)

`impl R<u32, PART_A>`[src]

`pub fn variant(&self) -> Variant<u32, PART_A>`[src]

Get enumerated values variant

`pub fn is_n52832(&self) -> bool`[src]

Checks if the value of the field is N52832

`pub fn is_unspecified(&self) -> bool`[src]

Checks if the value of the field is UNSPECIFIED

`impl R<u32, Reg<u32, _PART>>`[src]

`pub fn part(&self) -> R<u32, PART_A>`[src]

Bits 0:31 - Part code

`impl R<u32, VARIANT_A>`[src]

`pub fn variant(&self) -> Variant<u32, VARIANT_A>`[src]

Get enumerated values variant

`pub fn is_aaaa(&self) -> bool`[src]

Checks if the value of the field is AAAA

`pub fn is_aaab(&self) -> bool`[src]

Checks if the value of the field is AAAB

`pub fn is_aaba(&self) -> bool`[src]

Checks if the value of the field is AABA

`pub fn is_aabb(&self) -> bool`[src]

Checks if the value of the field is AABB

`pub fn is_aab0(&self) -> bool`[src]

Checks if the value of the field is AAB0

`pub fn is_aae0(&self) -> bool`[src]

Checks if the value of the field is AAE0

`pub fn is_unspecified(&self) -> bool`[src]

Checks if the value of the field is UNSPECIFIED

`impl R<u32, Reg<u32, _VARIANT>>`[src]

`pub fn variant(&self) -> R<u32, VARIANT_A>`[src]

Bits 0:31 - Part Variant, Hardware version and Production configuration, encoded as ASCII

`impl R<u32, PACKAGE_A>`[src]

`pub fn variant(&self) -> Variant<u32, PACKAGE_A>`[src]

`impl R<u32, Reg<u32, _T4>>`[src]

`pub fn t(&self) -> R<u8, u8>`[src]

Bits 0:7 - T (segment end)register.

`impl R<u32, Reg<u32, _TAGHEADER0>>`[src]

`pub fn mfgid(&self) -> R<u8, u8>`[src]

Bits 0:7 - Default Manufacturer ID: Nordic Semiconductor ASA has ICM 0x5F

`pub fn ud1(&self) -> R<u8, u8>`[src]

Bits 8:15 - Unique identifier byte 1

`pub fn ud2(&self) -> R<u8, u8>`[src]

Bits 16:23 - Unique identifier byte 2

`pub fn ud3(&self) -> R<u8, u8>`[src]

Bits 24:31 - Unique identifier byte 3

`impl R<u32, Reg<u32, _TAGHEADER1>>`[src]

`pub fn ud4(&self) -> R<u8, u8>`[src]

Bits 0:7 - Unique identifier byte 4

`pub fn ud5(&self) -> R<u8, u8>`[src]

Bits 8:15 - Unique identifier byte 5

`pub fn ud6(&self) -> R<u8, u8>`[src]

Bits 16:23 - Unique identifier byte 6

`pub fn ud7(&self) -> R<u8, u8>`[src]

Bits 24:31 - Unique identifier byte 7

`impl R<u32, Reg<u32, _TAGHEADER2>>`[src]

`pub fn ud8(&self) -> R<u8, u8>`[src]

Bits 0:7 - Unique identifier byte 8

`pub fn ud9(&self) -> R<u8, u8>`[src]

Bits 8:15 - Unique identifier byte 9

`pub fn ud10(&self) -> R<u8, u8>`[src]

Bits 16:23 - Unique identifier byte 10

`pub fn ud11(&self) -> R<u8, u8>`[src]

Bits 24:31 - Unique identifier byte 11

`impl R<u32, Reg<u32, _TAGHEADER3>>`[src]

`pub fn ud12(&self) -> R<u8, u8>`[src]

Bits 0:7 - Unique identifier byte 12

`pub fn ud13(&self) -> R<u8, u8>`[src]

Bits 8:15 - Unique identifier byte 13

`pub fn ud14(&self) -> R<u8, u8>`[src]

Bits 16:23 - Unique identifier byte 14

`pub fn ud15(&self) -> R<u8, u8>`[src]

Bits 24:31 - Unique identifier byte 15

`impl R<u32, Reg<u32, _CODEPAGESIZE>>`[src]

`pub fn codepagesize(&self) -> R<u32, u32>`[src]

Bits 0:31 - Code memory page size

`impl R<u32, Reg<u32, _CODESIZE>>`[src]

`pub fn codesize(&self) -> R<u32, u32>`[src]

Bits 0:31 - Code memory size in number of pages

`impl R<u32, Reg<u32, _DEVICEID>>`[src]

`pub fn deviceid(&self) -> R<u32, u32>`[src]

Bits 0:31 - 64 bit unique device identifier

`impl R<u32, Reg<u32, _ER>>`[src]

`pub fn er(&self) -> R<u32, u32>`[src]

Bits 0:31 - Encryption Root, word n

`impl R<u32, Reg<u32, _IR>>`[src]

`pub fn ir(&self) -> R<u32, u32>`[src]

Bits 0:31 - Identity Root, word n

`impl R<bool, DEVICEADDRTYPE_A>`[src]

`pub fn variant(&self) -> DEVICEADDRTYPE_A`[src]

Get enumerated values variant

`pub fn is_public(&self) -> bool`[src]

Checks if the value of the field is PUBLIC

`pub fn is_random(&self) -> bool`[src]

Checks if the value of the field is RANDOM

`impl R<u32, Reg<u32, _DEVICEADDRTYPE>>`[src]

`pub fn deviceaddrtype(&self) -> R<bool, DEVICEADDRTYPE_A>`[src]

Bit 0 - Device address type

`impl R<u32, Reg<u32, _DEVICEADDR>>`[src]

`pub fn deviceaddr(&self) -> R<u32, u32>`[src]

Bits 0:31 - 48 bit device address

`impl R<u32, Reg<u32, _NRFFW>>`[src]

`pub fn nrffw(&self) -> R<u32, u32>`[src]

Bits 0:31 - Reserved for Nordic firmware design

`impl R<u32, Reg<u32, _NRFHW>>`[src]

`pub fn nrfhw(&self) -> R<u32, u32>`[src]

Bits 0:31 - Reserved for Nordic hardware design

`impl R<u32, Reg<u32, _CUSTOMER>>`[src]

`pub fn customer(&self) -> R<u32, u32>`[src]

Bits 0:31 - Reserved for customer

`impl R<bool, CONNECT_A>`[src]

`pub fn variant(&self) -> CONNECT_A`[src]

Get enumerated values variant

`pub fn is_disconnected(&self) -> bool`[src]

Checks if the value of the field is DISCONNECTED

`pub fn is_connected(&self) -> bool`[src]

Checks if the value of the field is CONNECTED

`impl R<u32, Reg<u32, _PSELRESET>>`[src]

`pub fn pin(&self) -> R<u8, u8>`[src]

`pub fn region3(&self) -> R<bool, REGION3_A>`[src]

Bit 3 - Enable protection for region 3. Write '0' has no effect.

`pub fn region4(&self) -> R<bool, REGION4_A>`[src]

Bit 4 - Enable protection for region 4. Write '0' has no effect.

`pub fn region5(&self) -> R<bool, REGION5_A>`[src]

Bit 5 - Enable protection for region 5. Write '0' has no effect.

`pub fn region6(&self) -> R<bool, REGION6_A>`[src]

Bit 6 - Enable protection for region 6. Write '0' has no effect.

`pub fn region7(&self) -> R<bool, REGION7_A>`[src]

Bit 7 - Enable protection for region 7. Write '0' has no effect.

`pub fn region8(&self) -> R<bool, REGION8_A>`[src]

Bit 8 - Enable protection for region 8. Write '0' has no effect.

`pub fn region9(&self) -> R<bool, REGION9_A>`[src]

Bit 9 - Enable protection for region 9. Write '0' has no effect.

`pub fn region10(&self) -> R<bool, REGION10_A>`[src]

Bit 10 - Enable protection for region 10. Write '0' has no effect.

`pub fn region11(&self) -> R<bool, REGION11_A>`[src]

Bit 11 - Enable protection for region 11. Write '0' has no effect.

`pub fn region12(&self) -> R<bool, REGION12_A>`[src]

Bit 12 - Enable protection for region 12. Write '0' has no effect.

`pub fn region13(&self) -> R<bool, REGION13_A>`[src]

Bit 13 - Enable protection for region 13. Write '0' has no effect.

`pub fn region14(&self) -> R<bool, REGION14_A>`[src]

Bit 14 - Enable protection for region 14. Write '0' has no effect.

`pub fn region15(&self) -> R<bool, REGION15_A>`[src]

Bit 15 - Enable protection for region 15. Write '0' has no effect.

`pub fn region16(&self) -> R<bool, REGION16_A>`[src]

Bit 16 - Enable protection for region 16. Write '0' has no effect.

`pub fn region17(&self) -> R<bool, REGION17_A>`[src]

Bit 17 - Enable protection for region 17. Write '0' has no effect.

`pub fn region18(&self) -> R<bool, REGION18_A>`[src]

Bit 18 - Enable protection for region 18. Write '0' has no effect.

`pub fn region19(&self) -> R<bool, REGION19_A>`[src]

Bit 19 - Enable protection for region 19. Write '0' has no effect.

`pub fn region20(&self) -> R<bool, REGION20_A>`[src]

Bit 20 - Enable protection for region 20. Write '0' has no effect.

`pub fn region21(&self) -> R<bool, REGION21_A>`[src]

Bit 21 - Enable protection for region 21. Write '0' has no effect.

`pub fn region22(&self) -> R<bool, REGION22_A>`[src]

Bit 22 - Enable protection for region 22. Write '0' has no effect.

`pub fn region23(&self) -> R<bool, REGION23_A>`[src]

Bit 23 - Enable protection for region 23. Write '0' has no effect.

`pub fn region24(&self) -> R<bool, REGION24_A>`[src]

Bit 24 - Enable protection for region 24. Write '0' has no effect.

`pub fn region25(&self) -> R<bool, REGION25_A>`[src]

Bit 25 - Enable protection for region 25. Write '0' has no effect.

`pub fn region26(&self) -> R<bool, REGION26_A>`[src]

Bit 26 - Enable protection for region 26. Write '0' has no effect.

`pub fn region27(&self) -> R<bool, REGION27_A>`[src]

Bit 27 - Enable protection for region 27. Write '0' has no effect.

`pub fn region28(&self) -> R<bool, REGION28_A>`[src]

Bit 28 - Enable protection for region 28. Write '0' has no effect.

`pub fn region29(&self) -> R<bool, REGION29_A>`[src]

Bit 29 - Enable protection for region 29. Write '0' has no effect.

`pub fn region30(&self) -> R<bool, REGION30_A>`[src]

Bit 30 - Enable protection for region 30. Write '0' has no effect.

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _CONFIG1>>`[src]

`pub fn region32(&self) -> R<bool, REGION32_A>`[src]

Bit 0 - Enable protection for region 32. Write '0' has no effect.

`pub fn region33(&self) -> R<bool, REGION33_A>`[src]

Bit 1 - Enable protection for region 33. Write '0' has no effect.

`pub fn region34(&self) -> R<bool, REGION34_A>`[src]

Bit 2 - Enable protection for region 34. Write '0' has no effect.

`pub fn region35(&self) -> R<bool, REGION35_A>`[src]

Bit 3 - Enable protection for region 35. Write '0' has no effect.

`pub fn region36(&self) -> R<bool, REGION36_A>`[src]

Bit 4 - Enable protection for region 36. Write '0' has no effect.

`pub fn region37(&self) -> R<bool, REGION37_A>`[src]

Bit 5 - Enable protection for region 37. Write '0' has no effect.

`pub fn region38(&self) -> R<bool, REGION38_A>`[src]

Bit 6 - Enable protection for region 38. Write '0' has no effect.

`pub fn region39(&self) -> R<bool, REGION39_A>`[src]

Bit 7 - Enable protection for region 39. Write '0' has no effect.

`pub fn region40(&self) -> R<bool, REGION40_A>`[src]

Bit 8 - Enable protection for region 40. Write '0' has no effect.

`pub fn region41(&self) -> R<bool, REGION41_A>`[src]

Bit 9 - Enable protection for region 41. Write '0' has no effect.

`pub fn region42(&self) -> R<bool, REGION42_A>`[src]

Bit 10 - Enable protection for region 42. Write '0' has no effect.

`pub fn region43(&self) -> R<bool, REGION43_A>`[src]

Bit 11 - Enable protection for region 43. Write '0' has no effect.

`pub fn region44(&self) -> R<bool, REGION44_A>`[src]

Bit 12 - Enable protection for region 44. Write '0' has no effect.

`pub fn region45(&self) -> R<bool, REGION45_A>`[src]

Bit 13 - Enable protection for region 45. Write '0' has no effect.

`pub fn region46(&self) -> R<bool, REGION46_A>`[src]

Bit 14 - Enable protection for region 46. Write '0' has no effect.

`pub fn region47(&self) -> R<bool, REGION47_A>`[src]

Bit 15 - Enable protection for region 47. Write '0' has no effect.

`pub fn region48(&self) -> R<bool, REGION48_A>`[src]

Bit 16 - Enable protection for region 48. Write '0' has no effect.

`pub fn region49(&self) -> R<bool, REGION49_A>`[src]

Bit 17 - Enable protection for region 49. Write '0' has no effect.

`pub fn region50(&self) -> R<bool, REGION50_A>`[src]

Bit 18 - Enable protection for region 50. Write '0' has no effect.

`pub fn region51(&self) -> R<bool, REGION51_A>`[src]

Bit 19 - Enable protection for region 51. Write '0' has no effect.

`pub fn region52(&self) -> R<bool, REGION52_A>`[src]

Bit 20 - Enable protection for region 52. Write '0' has no effect.

`pub fn region53(&self) -> R<bool, REGION53_A>`[src]

Bit 21 - Enable protection for region 53. Write '0' has no effect.

`pub fn region54(&self) -> R<bool, REGION54_A>`[src]

Bit 22 - Enable protection for region 54. Write '0' has no effect.

`pub fn region55(&self) -> R<bool, REGION55_A>`[src]

Bit 23 - Enable protection for region 55. Write '0' has no effect.

`pub fn region56(&self) -> R<bool, REGION56_A>`[src]

Bit 24 - Enable protection for region 56. Write '0' has no effect.

`pub fn region57(&self) -> R<bool, REGION57_A>`[src]

Bit 25 - Enable protection for region 57. Write '0' has no effect.

`pub fn region58(&self) -> R<bool, REGION58_A>`[src]

Bit 26 - Enable protection for region 58. Write '0' has no effect.

`pub fn region59(&self) -> R<bool, REGION59_A>`[src]

Bit 27 - Enable protection for region 59. Write '0' has no effect.

`pub fn region60(&self) -> R<bool, REGION60_A>`[src]

Bit 28 - Enable protection for region 60. Write '0' has no effect.

`pub fn region61(&self) -> R<bool, REGION61_A>`[src]

Bit 29 - Enable protection for region 61. Write '0' has no effect.

`pub fn region62(&self) -> R<bool, REGION62_A>`[src]

Bit 30 - Enable protection for region 62. Write '0' has no effect.

`pub fn region63(&self) -> R<bool, REGION63_A>`[src]

Bit 31 - Enable protection for region 63. Write '0' has no effect.

`impl R<bool, DISABLEINDEBUG_A>`[src]

`pub fn variant(&self) -> DISABLEINDEBUG_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _CONFIG2>>`[src]

`pub fn region64(&self) -> R<bool, REGION64_A>`[src]

Bit 0 - Enable protection for region 64. Write '0' has no effect.

`pub fn region65(&self) -> R<bool, REGION65_A>`[src]

Bit 1 - Enable protection for region 65. Write '0' has no effect.

`pub fn region66(&self) -> R<bool, REGION66_A>`[src]

Bit 2 - Enable protection for region 66. Write '0' has no effect.

`pub fn region67(&self) -> R<bool, REGION67_A>`[src]

Bit 3 - Enable protection for region 67. Write '0' has no effect.

`pub fn region68(&self) -> R<bool, REGION68_A>`[src]

Bit 4 - Enable protection for region 68. Write '0' has no effect.

`pub fn region69(&self) -> R<bool, REGION69_A>`[src]

Bit 5 - Enable protection for region 69. Write '0' has no effect.

`pub fn region70(&self) -> R<bool, REGION70_A>`[src]

Bit 6 - Enable protection for region 70. Write '0' has no effect.

`pub fn region71(&self) -> R<bool, REGION71_A>`[src]

Bit 7 - Enable protection for region 71. Write '0' has no effect.

`pub fn region72(&self) -> R<bool, REGION72_A>`[src]

Bit 8 - Enable protection for region 72. Write '0' has no effect.

`pub fn region73(&self) -> R<bool, REGION73_A>`[src]

Bit 9 - Enable protection for region 73. Write '0' has no effect.

`pub fn region74(&self) -> R<bool, REGION74_A>`[src]

Bit 10 - Enable protection for region 74. Write '0' has no effect.

`pub fn region75(&self) -> R<bool, REGION75_A>`[src]

Bit 11 - Enable protection for region 75. Write '0' has no effect.

`pub fn region76(&self) -> R<bool, REGION76_A>`[src]

Bit 12 - Enable protection for region 76. Write '0' has no effect.

`pub fn region77(&self) -> R<bool, REGION77_A>`[src]

Bit 13 - Enable protection for region 77. Write '0' has no effect.

`pub fn region78(&self) -> R<bool, REGION78_A>`[src]

Bit 14 - Enable protection for region 78. Write '0' has no effect.

`pub fn region79(&self) -> R<bool, REGION79_A>`[src]

Bit 15 - Enable protection for region 79. Write '0' has no effect.

`pub fn region80(&self) -> R<bool, REGION80_A>`[src]

Bit 16 - Enable protection for region 80. Write '0' has no effect.

`pub fn region81(&self) -> R<bool, REGION81_A>`[src]

Bit 17 - Enable protection for region 81. Write '0' has no effect.

`pub fn region82(&self) -> R<bool, REGION82_A>`[src]

Bit 18 - Enable protection for region 82. Write '0' has no effect.

`pub fn region83(&self) -> R<bool, REGION83_A>`[src]

Bit 19 - Enable protection for region 83. Write '0' has no effect.

`pub fn region84(&self) -> R<bool, REGION84_A>`[src]

Bit 20 - Enable protection for region 84. Write '0' has no effect.

`pub fn region85(&self) -> R<bool, REGION85_A>`[src]

Bit 21 - Enable protection for region 85. Write '0' has no effect.

`pub fn region86(&self) -> R<bool, REGION86_A>`[src]

Bit 22 - Enable protection for region 86. Write '0' has no effect.

`pub fn region87(&self) -> R<bool, REGION87_A>`[src]

Bit 23 - Enable protection for region 87. Write '0' has no effect.

`pub fn region88(&self) -> R<bool, REGION88_A>`[src]

Bit 24 - Enable protection for region 88. Write '0' has no effect.

`pub fn region89(&self) -> R<bool, REGION89_A>`[src]

Bit 25 - Enable protection for region 89. Write '0' has no effect.

`pub fn region90(&self) -> R<bool, REGION90_A>`[src]

Bit 26 - Enable protection for region 90. Write '0' has no effect.

`pub fn region91(&self) -> R<bool, REGION91_A>`[src]

Bit 27 - Enable protection for region 91. Write '0' has no effect.

`pub fn region92(&self) -> R<bool, REGION92_A>`[src]

`pub fn region99(&self) -> R<bool, REGION99_A>`[src]

Bit 3 - Enable protection for region 99. Write '0' has no effect.

`pub fn region100(&self) -> R<bool, REGION100_A>`[src]

Bit 4 - Enable protection for region 100. Write '0' has no effect.

`pub fn region101(&self) -> R<bool, REGION101_A>`[src]

Bit 5 - Enable protection for region 101. Write '0' has no effect.

`pub fn region102(&self) -> R<bool, REGION102_A>`[src]

Bit 6 - Enable protection for region 102. Write '0' has no effect.

`pub fn region103(&self) -> R<bool, REGION103_A>`[src]

Bit 7 - Enable protection for region 103. Write '0' has no effect.

`pub fn region104(&self) -> R<bool, REGION104_A>`[src]

Bit 8 - Enable protection for region 104. Write '0' has no effect.

`pub fn region105(&self) -> R<bool, REGION105_A>`[src]

Bit 9 - Enable protection for region 105. Write '0' has no effect.

`pub fn region106(&self) -> R<bool, REGION106_A>`[src]

Bit 10 - Enable protection for region 106. Write '0' has no effect.

`pub fn region107(&self) -> R<bool, REGION107_A>`[src]

Bit 11 - Enable protection for region 107. Write '0' has no effect.

`pub fn region108(&self) -> R<bool, REGION108_A>`[src]

Bit 12 - Enable protection for region 108. Write '0' has no effect.

`pub fn region109(&self) -> R<bool, REGION109_A>`[src]

Bit 13 - Enable protection for region 109. Write '0' has no effect.

`pub fn region110(&self) -> R<bool, REGION110_A>`[src]

Bit 14 - Enable protection for region 110. Write '0' has no effect.

`pub fn region111(&self) -> R<bool, REGION111_A>`[src]

Bit 15 - Enable protection for region 111. Write '0' has no effect.

`pub fn region112(&self) -> R<bool, REGION112_A>`[src]

Bit 16 - Enable protection for region 112. Write '0' has no effect.

`pub fn region113(&self) -> R<bool, REGION113_A>`[src]

Bit 17 - Enable protection for region 113. Write '0' has no effect.

`pub fn region114(&self) -> R<bool, REGION114_A>`[src]

Bit 18 - Enable protection for region 114. Write '0' has no effect.

`pub fn region115(&self) -> R<bool, REGION115_A>`[src]

Bit 19 - Enable protection for region 115. Write '0' has no effect.

`pub fn region116(&self) -> R<bool, REGION116_A>`[src]

Bit 20 - Enable protection for region 116. Write '0' has no effect.

`pub fn region117(&self) -> R<bool, REGION117_A>`[src]

Bit 21 - Enable protection for region 117. Write '0' has no effect.

`pub fn region118(&self) -> R<bool, REGION118_A>`[src]

Bit 22 - Enable protection for region 118. Write '0' has no effect.

`pub fn region119(&self) -> R<bool, REGION119_A>`[src]

Bit 23 - Enable protection for region 119. Write '0' has no effect.

`pub fn region120(&self) -> R<bool, REGION120_A>`[src]

Bit 24 - Enable protection for region 120. Write '0' has no effect.

`pub fn region121(&self) -> R<bool, REGION121_A>`[src]

Bit 25 - Enable protection for region 121. Write '0' has no effect.

`pub fn region122(&self) -> R<bool, REGION122_A>`[src]

Bit 26 - Enable protection for region 122. Write '0' has no effect.

`pub fn region123(&self) -> R<bool, REGION123_A>`[src]

Bit 27 - Enable protection for region 123. Write '0' has no effect.

`pub fn region124(&self) -> R<bool, REGION124_A>`[src]

Bit 28 - Enable protection for region 124. Write '0' has no effect.

`pub fn region125(&self) -> R<bool, REGION125_A>`[src]

Bit 29 - Enable protection for region 125. Write '0' has no effect.

`pub fn region126(&self) -> R<bool, REGION126_A>`[src]

Bit 30 - Enable protection for region 126. Write '0' has no effect.

`pub fn region127(&self) -> R<bool, REGION127_A>`[src]

Bit 31 - Enable protection for region 127. Write '0' has no effect.

`impl R<bool, S0POWER_A>`[src]

`pub fn variant(&self) -> S0POWER_A`[src]

Get enumerated values variant

`pub fn is_off(&self) -> bool`[src]

Checks if the value of the field is OFF

`pub fn is_on(&self) -> bool`[src]

Checks if the value of the field is ON

`impl R<bool, S1POWER_A>`[src]

`pub fn variant(&self) -> S1POWER_A`[src]

Get enumerated values variant

`pub fn is_off(&self) -> bool`[src]

Checks if the value of the field is OFF

`pub fn is_on(&self) -> bool`[src]

Checks if the value of the field is ON

`impl R<bool, S0RETENTION_A>`[src]

`pub fn variant(&self) -> S0RETENTION_A`[src]

Get enumerated values variant

`pub fn is_off(&self) -> bool`[src]

Checks if the value of the field is OFF

`pub fn is_on(&self) -> bool`[src]

Checks if the value of the field is ON

`impl R<bool, S1RETENTION_A>`[src]

`pub fn variant(&self) -> S1RETENTION_A`[src]

Get enumerated values variant

`pub fn is_off(&self) -> bool`[src]

Checks if the value of the field is OFF

`pub fn is_on(&self) -> bool`[src]

Checks if the value of the field is ON

`impl R<u32, Reg<u32, _POWER>>`[src]

`pub fn s0power(&self) -> R<bool, S0POWER_A>`[src]

`pub fn lockup(&self) -> R<bool, LOCKUP_A>`[src]

Bit 3 - Reset from CPU lock-up detected

`pub fn off(&self) -> R<bool, OFF_A>`[src]

`pub fn ramblock3(&self) -> R<bool, RAMBLOCK3_A>`[src]

Bit 3 - RAM block 3 is on or off/powering up

`impl R<bool, POF_A>`[src]

`pub fn variant(&self) -> POF_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u8, THRESHOLD_A>`[src]

`pub fn variant(&self) -> Variant<u8, THRESHOLD_A>`[src]

Get enumerated values variant

`pub fn is_v17(&self) -> bool`[src]

Checks if the value of the field is V17

`pub fn is_v18(&self) -> bool`[src]

Checks if the value of the field is V18

`pub fn is_v19(&self) -> bool`[src]

Checks if the value of the field is V19

`pub fn is_v20(&self) -> bool`[src]

Checks if the value of the field is V20

`pub fn is_v21(&self) -> bool`[src]

Checks if the value of the field is V21

`pub fn is_v22(&self) -> bool`[src]

Checks if the value of the field is V22

`pub fn is_v23(&self) -> bool`[src]

Checks if the value of the field is V23

`pub fn is_v24(&self) -> bool`[src]

Checks if the value of the field is V24

`pub fn is_v25(&self) -> bool`[src]

Checks if the value of the field is V25

`pub fn is_v26(&self) -> bool`[src]

Checks if the value of the field is V26

`pub fn is_v27(&self) -> bool`[src]

Checks if the value of the field is V27

`pub fn is_v28(&self) -> bool`[src]

Checks if the value of the field is V28

`impl R<u32, Reg<u32, _POFCON>>`[src]

`pub fn pof(&self) -> R<bool, POF_A>`[src]

Bit 0 - Enable or disable power failure comparator

`pub fn threshold(&self) -> R<u8, THRESHOLD_A>`[src]

Bits 1:4 - Power failure comparator threshold setting

`impl R<u32, Reg<u32, _GPREGRET>>`[src]

`pub fn gpregret(&self) -> R<u8, u8>`[src]

Bits 0:7 - General purpose retention register

`impl R<u32, Reg<u32, _GPREGRET2>>`[src]

`pub fn gpregret(&self) -> R<u8, u8>`[src]

Bits 0:7 - General purpose retention register

`impl R<bool, ONRAM0_A>`[src]

`pub fn variant(&self) -> ONRAM0_A`[src]

Get enumerated values variant

`pub fn is_ram0off(&self) -> bool`[src]

Checks if the value of the field is RAM0OFF

`pub fn is_ram0on(&self) -> bool`[src]

Checks if the value of the field is RAM0ON

`impl R<bool, ONRAM1_A>`[src]

`pub fn variant(&self) -> ONRAM1_A`[src]

Get enumerated values variant

`pub fn is_ram1off(&self) -> bool`[src]

Checks if the value of the field is RAM1OFF

`pub fn is_ram1on(&self) -> bool`[src]

Checks if the value of the field is RAM1ON

`impl R<bool, OFFRAM0_A>`[src]

`pub fn variant(&self) -> OFFRAM0_A`[src]

Get enumerated values variant

`pub fn is_ram0off(&self) -> bool`[src]

Checks if the value of the field is RAM0OFF

`pub fn is_ram0on(&self) -> bool`[src]

Checks if the value of the field is RAM0ON

`impl R<bool, OFFRAM1_A>`[src]

`pub fn variant(&self) -> OFFRAM1_A`[src]

Get enumerated values variant

`pub fn is_ram1off(&self) -> bool`[src]

Checks if the value of the field is RAM1OFF

`pub fn is_ram1on(&self) -> bool`[src]

Checks if the value of the field is RAM1ON

`impl R<u32, Reg<u32, _RAMON>>`[src]

`pub fn onram0(&self) -> R<bool, ONRAM0_A>`[src]

`pub fn offram3(&self) -> R<bool, OFFRAM3_A>`[src]

Bit 17 - Keep retention on RAM block 3 when RAM block is switched off

`impl R<bool, DCDCEN_A>`[src]

`pub fn variant(&self) -> DCDCEN_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _DCDCEN>>`[src]

`pub fn dcdcen(&self) -> R<bool, DCDCEN_A>`[src]

Bit 0 - Enable or disable DC/DC converter

`impl R<bool, HFCLKSTARTED_A>`[src]

`pub fn variant(&self) -> HFCLKSTARTED_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, LFCLKSTARTED_A>`[src]

`pub fn variant(&self) -> LFCLKSTARTED_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, DONE_A>`[src]

`pub fn variant(&self) -> DONE_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, CTTO_A>`[src]

`pub fn variant(&self) -> CTTO_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn hfclkstarted(&self) -> R<bool, HFCLKSTARTED_A>`[src]

`pub fn ctto(&self) -> R<bool, CTTO_A>`[src]

Bit 4 - Write '1' to Disable interrupt for CTTO event

`impl R<bool, STATUS_A>`[src]

`pub fn variant(&self) -> STATUS_A`[src]

Get enumerated values variant

`pub fn is_not_triggered(&self) -> bool`[src]

Checks if the value of the field is NOTTRIGGERED

`pub fn is_triggered(&self) -> bool`[src]

Checks if the value of the field is TRIGGERED

`impl R<u32, Reg<u32, _HFCLKRUN>>`[src]

`pub fn status(&self) -> R<bool, STATUS_A>`[src]

Bit 0 - HFCLKSTART task triggered or not

`impl R<bool, SRC_A>`[src]

`pub fn variant(&self) -> SRC_A`[src]

Get enumerated values variant

`pub fn is_rc(&self) -> bool`[src]

Checks if the value of the field is RC

`pub fn is_xtal(&self) -> bool`[src]

Checks if the value of the field is XTAL

`pub fn is_running(&self) -> bool`[src]

Checks if the value of the field is RUNNING

`impl R<u32, Reg<u32, _LFCLKSTAT>>`[src]

`pub fn src(&self) -> R<u8, SRC_A>`[src]

Bits 0:1 - Source of LFCLK

`pub fn state(&self) -> R<bool, STATE_A>`[src]

Bit 16 - LFCLK state

`impl R<u8, SRC_A>`[src]

`pub fn variant(&self) -> Variant<u8, SRC_A>`[src]

Get enumerated values variant

`pub fn is_rc(&self) -> bool`[src]

Checks if the value of the field is RC

`pub fn is_xtal(&self) -> bool`[src]

Checks if the value of the field is XTAL

`pub fn is_synth(&self) -> bool`[src]

Checks if the value of the field is SYNTH

`impl R<u32, Reg<u32, _LFCLKSRCCOPY>>`[src]

`pub fn src(&self) -> R<u8, SRC_A>`[src]

Bits 0:1 - Clock source

`impl R<u8, SRC_A>`[src]

`pub fn variant(&self) -> Variant<u8, SRC_A>`[src]

Get enumerated values variant

`pub fn is_rc(&self) -> bool`[src]

Checks if the value of the field is RC

`pub fn is_xtal(&self) -> bool`[src]

Checks if the value of the field is XTAL

`pub fn is_synth(&self) -> bool`[src]

Checks if the value of the field is SYNTH

`impl R<bool, BYPASS_A>`[src]

`pub fn variant(&self) -> BYPASS_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, EXTERNAL_A>`[src]

`pub fn variant(&self) -> EXTERNAL_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _LFCLKSRC>>`[src]

`pub fn src(&self) -> R<u8, SRC_A>`[src]

Bits 0:1 - Clock source

`pub fn bypass(&self) -> R<bool, BYPASS_A>`[src]

Bit 16 - Enable or disable bypass of LFCLK crystal oscillator with external clock source

`pub fn external(&self) -> R<bool, EXTERNAL_A>`[src]

Bit 17 - Enable or disable external source for LFCLK

`impl R<u32, Reg<u32, _CTIV>>`[src]

`pub fn ctiv(&self) -> R<u8, u8>`[src]

Bits 0:6 - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds.

`impl R<u8, TRACEPORTSPEED_A>`[src]

`pub fn variant(&self) -> TRACEPORTSPEED_A`[src]

Get enumerated values variant

`pub fn is_32mhz(&self) -> bool`[src]

Checks if the value of the field is _32MHZ

`pub fn is_16mhz(&self) -> bool`[src]

Checks if the value of the field is _16MHZ

`pub fn is_8mhz(&self) -> bool`[src]

Checks if the value of the field is _8MHZ

`pub fn is_4mhz(&self) -> bool`[src]

Checks if the value of the field is _4MHZ

`impl R<u8, TRACEMUX_A>`[src]

`pub fn variant(&self) -> Variant<u8, TRACEMUX_A>`[src]

Get enumerated values variant

`pub fn is_gpio(&self) -> bool`[src]

Checks if the value of the field is GPIO

`pub fn is_serial(&self) -> bool`[src]

Checks if the value of the field is SERIAL

`pub fn is_parallel(&self) -> bool`[src]

Checks if the value of the field is PARALLEL

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _SHORTS>>`[src]

`pub fn ready_start(&self) -> R<bool, READY_START_A>`[src]

Bit 0 - Shortcut between READY event and START task

`pub fn end_disable(&self) -> R<bool, END_DISABLE_A>`[src]

Bit 1 - Shortcut between END event and DISABLE task

`pub fn disabled_txen(&self) -> R<bool, DISABLED_TXEN_A>`[src]

Bit 2 - Shortcut between DISABLED event and TXEN task

`pub fn disabled_rxen(&self) -> R<bool, DISABLED_RXEN_A>`[src]

Bit 3 - Shortcut between DISABLED event and RXEN task

`pub fn address_rssistart(&self) -> R<bool, ADDRESS_RSSISTART_A>`[src]

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn ready(&self) -> R<bool, READY_A>`[src]

Bit 0 - Write '1' to Enable interrupt for READY event

`pub fn address(&self) -> R<bool, ADDRESS_A>`[src]

Bit 1 - Write '1' to Enable interrupt for ADDRESS event

`pub fn payload(&self) -> R<bool, PAYLOAD_A>`[src]

Bit 2 - Write '1' to Enable interrupt for PAYLOAD event

`pub fn end(&self) -> R<bool, END_A>`[src]

Bit 3 - Write '1' to Enable interrupt for END event

`pub fn disabled(&self) -> R<bool, DISABLED_A>`[src]

Bit 4 - Write '1' to Enable interrupt for DISABLED event

`pub fn devmatch(&self) -> R<bool, DEVMATCH_A>`[src]

Bit 5 - Write '1' to Enable interrupt for DEVMATCH event

`pub fn devmiss(&self) -> R<bool, DEVMISS_A>`[src]

Bit 6 - Write '1' to Enable interrupt for DEVMISS event

`pub fn rssiend(&self) -> R<bool, RSSIEND_A>`[src]

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn ready(&self) -> R<bool, READY_A>`[src]

Bit 0 - Write '1' to Disable interrupt for READY event

`pub fn address(&self) -> R<bool, ADDRESS_A>`[src]

Bit 1 - Write '1' to Disable interrupt for ADDRESS event

`pub fn payload(&self) -> R<bool, PAYLOAD_A>`[src]

Bit 2 - Write '1' to Disable interrupt for PAYLOAD event

`pub fn end(&self) -> R<bool, END_A>`[src]

Bit 3 - Write '1' to Disable interrupt for END event

`pub fn disabled(&self) -> R<bool, DISABLED_A>`[src]

Bit 4 - Write '1' to Disable interrupt for DISABLED event

`pub fn devmatch(&self) -> R<bool, DEVMATCH_A>`[src]

Bit 5 - Write '1' to Disable interrupt for DEVMATCH event

`pub fn devmiss(&self) -> R<bool, DEVMISS_A>`[src]

Bit 6 - Write '1' to Disable interrupt for DEVMISS event

`pub fn rssiend(&self) -> R<bool, RSSIEND_A>`[src]

Bit 7 - Write '1' to Disable interrupt for RSSIEND event

`pub fn bcmatch(&self) -> R<bool, BCMATCH_A>`[src]

Bit 10 - Write '1' to Disable interrupt for BCMATCH event

`pub fn crcok(&self) -> R<bool, CRCOK_A>`[src]

Bit 12 - Write '1' to Disable interrupt for CRCOK event

`pub fn crcerror(&self) -> R<bool, CRCERROR_A>`[src]

Bit 13 - Write '1' to Disable interrupt for CRCERROR event

`impl R<bool, CRCSTATUS_A>`[src]

`pub fn variant(&self) -> CRCSTATUS_A`[src]

Get enumerated values variant

`pub fn is_crcerror(&self) -> bool`[src]

Checks if the value of the field is CRCERROR

`pub fn is_crcok(&self) -> bool`[src]

Checks if the value of the field is CRCOK

`impl R<u32, Reg<u32, _CRCSTATUS>>`[src]

`pub fn crcstatus(&self) -> R<bool, CRCSTATUS_A>`[src]

Bit 0 - CRC status of packet received

`impl R<u32, Reg<u32, _RXMATCH>>`[src]

`pub fn rxmatch(&self) -> R<u8, u8>`[src]

Bits 0:2 - Received address

`impl R<u32, Reg<u32, _RXCRC>>`[src]

`pub fn rxcrc(&self) -> R<u32, u32>`[src]

Bits 0:23 - CRC field of previously received packet

`impl R<u32, Reg<u32, _DAI>>`[src]

`pub fn dai(&self) -> R<u8, u8>`[src]

Bits 0:2 - Device address match index

`impl R<u32, Reg<u32, _PACKETPTR>>`[src]

`pub fn packetptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Packet pointer

`impl R<bool, MAP_A>`[src]

`pub fn variant(&self) -> MAP_A`[src]

Get enumerated values variant

`pub fn is_default(&self) -> bool`[src]

Checks if the value of the field is DEFAULT

`pub fn is_low(&self) -> bool`[src]

Checks if the value of the field is LOW

`impl R<u32, Reg<u32, _FREQUENCY>>`[src]

`pub fn frequency(&self) -> R<u8, u8>`[src]

Bits 0:6 - Radio channel frequency

`pub fn map(&self) -> R<bool, MAP_A>`[src]

Bit 8 - Channel map selection.

`impl R<u8, TXPOWER_A>`[src]

`pub fn variant(&self) -> Variant<u8, TXPOWER_A>`[src]

Get enumerated values variant

`pub fn is_pos4d_bm(&self) -> bool`[src]

Checks if the value of the field is POS4DBM

`pub fn is_pos3d_bm(&self) -> bool`[src]

Checks if the value of the field is POS3DBM

`pub fn is_0d_bm(&self) -> bool`[src]

Checks if the value of the field is _0DBM

`pub fn is_neg4d_bm(&self) -> bool`[src]

Checks if the value of the field is NEG4DBM

`pub fn is_neg8d_bm(&self) -> bool`[src]

Checks if the value of the field is NEG8DBM

`pub fn is_neg12d_bm(&self) -> bool`[src]

Checks if the value of the field is NEG12DBM

`pub fn is_neg16d_bm(&self) -> bool`[src]

Checks if the value of the field is NEG16DBM

`pub fn is_neg20d_bm(&self) -> bool`[src]

Checks if the value of the field is NEG20DBM

`pub fn is_neg40d_bm(&self) -> bool`[src]

Checks if the value of the field is NEG40DBM

`impl R<u32, Reg<u32, _TXPOWER>>`[src]

`pub fn txpower(&self) -> R<u8, TXPOWER_A>`[src]

Bits 0:7 - RADIO output power.

`impl R<u8, MODE_A>`[src]

`pub fn variant(&self) -> Variant<u8, MODE_A>`[src]

Get enumerated values variant

`pub fn is_nrf_1mbit(&self) -> bool`[src]

Checks if the value of the field is NRF_1MBIT

`pub fn is_nrf_2mbit(&self) -> bool`[src]

Checks if the value of the field is NRF_2MBIT

`pub fn is_nrf_250kbit(&self) -> bool`[src]

Checks if the value of the field is NRF_250KBIT

`pub fn is_ble_1mbit(&self) -> bool`[src]

Checks if the value of the field is BLE_1MBIT

`pub fn is_ble_2mbit(&self) -> bool`[src]

Checks if the value of the field is BLE_2MBIT

`impl R<u32, Reg<u32, _MODE>>`[src]

`pub fn mode(&self) -> R<u8, MODE_A>`[src]

Bits 0:3 - Radio data rate and modulation setting. The radio supports Frequency-shift Keying (FSK) modulation.

`impl R<bool, S1INCL_A>`[src]

`pub fn variant(&self) -> S1INCL_A`[src]

Get enumerated values variant

`pub fn is_automatic(&self) -> bool`[src]

Checks if the value of the field is AUTOMATIC

`pub fn is_include(&self) -> bool`[src]

Checks if the value of the field is INCLUDE

`impl R<bool, PLEN_A>`[src]

`pub fn variant(&self) -> PLEN_A`[src]

Get enumerated values variant

`pub fn is_8bit(&self) -> bool`[src]

Checks if the value of the field is _8BIT

`pub fn is_16bit(&self) -> bool`[src]

Checks if the value of the field is _16BIT

`impl R<u32, Reg<u32, _PCNF0>>`[src]

`pub fn lflen(&self) -> R<u8, u8>`[src]

Bits 0:3 - Length on air of LENGTH field in number of bits.

`pub fn s0len(&self) -> R<bool, bool>`[src]

Bit 8 - Length on air of S0 field in number of bytes.

`pub fn s1len(&self) -> R<u8, u8>`[src]

Bits 16:19 - Length on air of S1 field in number of bits.

`pub fn s1incl(&self) -> R<bool, S1INCL_A>`[src]

Bit 20 - Include or exclude S1 field in RAM

`pub fn plen(&self) -> R<bool, PLEN_A>`[src]

Bit 24 - Length of preamble on air. Decision point: TASKS_START task

`impl R<bool, ENDIAN_A>`[src]

`pub fn variant(&self) -> ENDIAN_A`[src]

Get enumerated values variant

`pub fn is_little(&self) -> bool`[src]

Checks if the value of the field is LITTLE

`pub fn is_big(&self) -> bool`[src]

Checks if the value of the field is BIG

`impl R<bool, WHITEEN_A>`[src]

`pub fn variant(&self) -> WHITEEN_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _PCNF1>>`[src]

`pub fn maxlen(&self) -> R<u8, u8>`[src]

Bits 0:7 - Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN.

`pub fn statlen(&self) -> R<u8, u8>`[src]

Bits 8:15 - Static length in number of bytes

`pub fn balen(&self) -> R<u8, u8>`[src]

Bits 16:18 - Base address length in number of bytes

`pub fn endian(&self) -> R<bool, ENDIAN_A>`[src]

Bit 24 - On air endianness of packet, this applies to the S0, LENGTH, S1 and the PAYLOAD fields.

`pub fn whiteen(&self) -> R<bool, WHITEEN_A>`[src]

Bit 25 - Enable or disable packet whitening

`impl R<u32, Reg<u32, _BASE0>>`[src]

`pub fn base0(&self) -> R<u32, u32>`[src]

Bits 0:31 - Base address 0

`impl R<u32, Reg<u32, _BASE1>>`[src]

`pub fn base1(&self) -> R<u32, u32>`[src]

Bits 0:31 - Base address 1

`impl R<u32, Reg<u32, _PREFIX0>>`[src]

`pub fn ap0(&self) -> R<u8, u8>`[src]

Bits 0:7 - Address prefix 0.

`pub fn ap1(&self) -> R<u8, u8>`[src]

Bits 8:15 - Address prefix 1.

`pub fn ap2(&self) -> R<u8, u8>`[src]

Bits 16:23 - Address prefix 2.

`pub fn ap3(&self) -> R<u8, u8>`[src]

Bits 24:31 - Address prefix 3.

`impl R<u32, Reg<u32, _PREFIX1>>`[src]

`pub fn ap4(&self) -> R<u8, u8>`[src]

Bits 0:7 - Address prefix 4.

`pub fn ap5(&self) -> R<u8, u8>`[src]

Bits 8:15 - Address prefix 5.

`pub fn ap6(&self) -> R<u8, u8>`[src]

Bits 16:23 - Address prefix 6.

`pub fn ap7(&self) -> R<u8, u8>`[src]

Bits 24:31 - Address prefix 7.

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _RXADDRESSES>>`[src]

`pub fn addr0(&self) -> R<bool, ADDR0_A>`[src]

Bit 0 - Enable or disable reception on logical address 0.

`pub fn addr1(&self) -> R<bool, ADDR1_A>`[src]

Bit 1 - Enable or disable reception on logical address 1.

`pub fn addr2(&self) -> R<bool, ADDR2_A>`[src]

Bit 2 - Enable or disable reception on logical address 2.

`pub fn addr3(&self) -> R<bool, ADDR3_A>`[src]

Bit 3 - Enable or disable reception on logical address 3.

`pub fn addr4(&self) -> R<bool, ADDR4_A>`[src]

Bit 4 - Enable or disable reception on logical address 4.

`pub fn addr5(&self) -> R<bool, ADDR5_A>`[src]

Bit 5 - Enable or disable reception on logical address 5.

`pub fn addr6(&self) -> R<bool, ADDR6_A>`[src]

Bit 6 - Enable or disable reception on logical address 6.

`pub fn addr7(&self) -> R<bool, ADDR7_A>`[src]

Bit 7 - Enable or disable reception on logical address 7.

`impl R<u8, LEN_A>`[src]

`pub fn variant(&self) -> LEN_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_one(&self) -> bool`[src]

Checks if the value of the field is ONE

`pub fn is_two(&self) -> bool`[src]

Checks if the value of the field is TWO

`pub fn is_three(&self) -> bool`[src]

Checks if the value of the field is THREE

`impl R<bool, SKIPADDR_A>`[src]

`pub fn variant(&self) -> SKIPADDR_A`[src]

Get enumerated values variant

`pub fn is_include(&self) -> bool`[src]

Checks if the value of the field is INCLUDE

`pub fn is_skip(&self) -> bool`[src]

Checks if the value of the field is SKIP

`impl R<u32, Reg<u32, _CRCCNF>>`[src]

`pub fn len(&self) -> R<u8, LEN_A>`[src]

Bits 0:1 - CRC length in number of bytes.

`pub fn skipaddr(&self) -> R<bool, SKIPADDR_A>`[src]

Bit 8 - Include or exclude packet address field out of CRC calculation.

`impl R<u32, Reg<u32, _CRCPOLY>>`[src]

`pub fn crcpoly(&self) -> R<u32, u32>`[src]

Bits 0:23 - CRC polynomial

`impl R<u32, Reg<u32, _CRCINIT>>`[src]

`pub fn crcinit(&self) -> R<u32, u32>`[src]

Bits 0:23 - CRC initial value

`impl R<u32, Reg<u32, _TIFS>>`[src]

`pub fn tifs(&self) -> R<u8, u8>`[src]

Bits 0:7 - Inter Frame Spacing in us

`impl R<u32, Reg<u32, _RSSISAMPLE>>`[src]

`pub fn rssisample(&self) -> R<u8, u8>`[src]

Bits 0:6 - RSSI sample

`impl R<u8, STATE_A>`[src]

`pub fn variant(&self) -> Variant<u8, STATE_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_rx_ru(&self) -> bool`[src]

Checks if the value of the field is RXRU

`pub fn is_rx_idle(&self) -> bool`[src]

Checks if the value of the field is RXIDLE

`pub fn is_rx(&self) -> bool`[src]

Checks if the value of the field is RX

`pub fn is_rx_disable(&self) -> bool`[src]

Checks if the value of the field is RXDISABLE

`pub fn is_tx_ru(&self) -> bool`[src]

Checks if the value of the field is TXRU

`pub fn is_tx_idle(&self) -> bool`[src]

Checks if the value of the field is TXIDLE

`pub fn is_tx(&self) -> bool`[src]

Checks if the value of the field is TX

`pub fn is_tx_disable(&self) -> bool`[src]

Checks if the value of the field is TXDISABLE

`impl R<u32, Reg<u32, _STATE>>`[src]

`pub fn state(&self) -> R<u8, STATE_A>`[src]

Bits 0:3 - Current radio state

`impl R<u32, Reg<u32, _DATAWHITEIV>>`[src]

`pub fn datawhiteiv(&self) -> R<u8, u8>`[src]

Bits 0:6 - Data whitening initial value. Bit 6 is hard-wired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'.

`impl R<u32, Reg<u32, _BCC>>`[src]

`pub fn bcc(&self) -> R<u32, u32>`[src]

Bits 0:31 - Bit counter compare

`impl R<u32, Reg<u32, _DAB>>`[src]

`pub fn dab(&self) -> R<u32, u32>`[src]

Bits 0:31 - Device address base segment 0

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _DACNF>>`[src]

`pub fn ena0(&self) -> R<bool, ENA0_A>`[src]

Bit 0 - Enable or disable device address matching using device address 0

`pub fn ena1(&self) -> R<bool, ENA1_A>`[src]

Bit 1 - Enable or disable device address matching using device address 1

`pub fn ena2(&self) -> R<bool, ENA2_A>`[src]

Bit 2 - Enable or disable device address matching using device address 2

`pub fn ena3(&self) -> R<bool, ENA3_A>`[src]

Bit 3 - Enable or disable device address matching using device address 3

`pub fn ena4(&self) -> R<bool, ENA4_A>`[src]

Bit 4 - Enable or disable device address matching using device address 4

`pub fn ena5(&self) -> R<bool, ENA5_A>`[src]

Bit 5 - Enable or disable device address matching using device address 5

`pub fn ena6(&self) -> R<bool, ENA6_A>`[src]

Bit 6 - Enable or disable device address matching using device address 6

`pub fn ena7(&self) -> R<bool, ENA7_A>`[src]

Bit 7 - Enable or disable device address matching using device address 7

`pub fn txadd0(&self) -> R<bool, bool>`[src]

Bit 8 - TxAdd for device address 0

`pub fn txadd1(&self) -> R<bool, bool>`[src]

Bit 9 - TxAdd for device address 1

`pub fn txadd2(&self) -> R<bool, bool>`[src]

Bit 10 - TxAdd for device address 2

`pub fn txadd3(&self) -> R<bool, bool>`[src]

Bit 11 - TxAdd for device address 3

`pub fn txadd4(&self) -> R<bool, bool>`[src]

Bit 12 - TxAdd for device address 4

`pub fn txadd5(&self) -> R<bool, bool>`[src]

Bit 13 - TxAdd for device address 5

`pub fn txadd6(&self) -> R<bool, bool>`[src]

Bit 14 - TxAdd for device address 6

`pub fn txadd7(&self) -> R<bool, bool>`[src]

Bit 15 - TxAdd for device address 7

`impl R<bool, RU_A>`[src]

`pub fn variant(&self) -> RU_A`[src]

Get enumerated values variant

`pub fn is_default(&self) -> bool`[src]

Checks if the value of the field is DEFAULT

`pub fn is_fast(&self) -> bool`[src]

Checks if the value of the field is FAST

`impl R<u8, DTX_A>`[src]

`pub fn variant(&self) -> Variant<u8, DTX_A>`[src]

Get enumerated values variant

`pub fn is_b1(&self) -> bool`[src]

Checks if the value of the field is B1

`pub fn is_b0(&self) -> bool`[src]

Checks if the value of the field is B0

`pub fn is_center(&self) -> bool`[src]

Checks if the value of the field is CENTER

`impl R<u32, Reg<u32, _MODECNF0>>`[src]

`pub fn ru(&self) -> R<bool, RU_A>`[src]

Bit 0 - Radio ramp-up time

`pub fn dtx(&self) -> R<u8, DTX_A>`[src]

Bits 8:9 - Default TX value

`impl R<bool, POWER_A>`[src]

`pub fn variant(&self) -> POWER_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

Bits 0:4 - Pin number

`pub fn connect(&self) -> R<bool, CONNECT_A>`[src]

Bit 31 - Connection

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Data pointer

`impl R<u32, Reg<u32, _MAXCNT>>`[src]

`pub fn maxcnt(&self) -> R<u8, u8>`[src]

Bits 0:7 - Maximum number of bytes in receive buffer

`impl R<u32, Reg<u32, _AMOUNT>>`[src]

`pub fn amount(&self) -> R<u8, u8>`[src]

Bits 0:7 - Number of bytes transferred in the last transaction

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Data pointer

`impl R<u32, Reg<u32, _MAXCNT>>`[src]

`pub fn maxcnt(&self) -> R<u8, u8>`[src]

Bits 0:7 - Maximum number of bytes in transmit buffer

`impl R<u32, Reg<u32, _AMOUNT>>`[src]

`pub fn amount(&self) -> R<u8, u8>`[src]

Bits 0:7 - Number of bytes transferred in the last transaction

`impl R<bool, ENDRX_STARTRX_A>`[src]

`pub fn variant(&self) -> ENDRX_STARTRX_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, ENDRX_STOPRX_A>`[src]

`pub fn variant(&self) -> ENDRX_STOPRX_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

Bit 0 - Enable or disable interrupt for CTS event

`pub fn ncts(&self) -> R<bool, NCTS_A>`[src]

Bit 1 - Enable or disable interrupt for NCTS event

`pub fn rxdrdy(&self) -> R<bool, RXDRDY_A>`[src]

Bit 2 - Enable or disable interrupt for RXDRDY event

`pub fn endrx(&self) -> R<bool, ENDRX_A>`[src]

Bit 4 - Enable or disable interrupt for ENDRX event

`pub fn txdrdy(&self) -> R<bool, TXDRDY_A>`[src]

Bit 7 - Enable or disable interrupt for TXDRDY event

`pub fn endtx(&self) -> R<bool, ENDTX_A>`[src]

Bit 8 - Enable or disable interrupt for ENDTX event

`pub fn error(&self) -> R<bool, ERROR_A>`[src]

Bit 9 - Enable or disable interrupt for ERROR event

`pub fn rxto(&self) -> R<bool, RXTO_A>`[src]

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn cts(&self) -> R<bool, CTS_A>`[src]

Bit 0 - Write '1' to Enable interrupt for CTS event

`pub fn ncts(&self) -> R<bool, NCTS_A>`[src]

Bit 1 - Write '1' to Enable interrupt for NCTS event

`pub fn rxdrdy(&self) -> R<bool, RXDRDY_A>`[src]

Bit 2 - Write '1' to Enable interrupt for RXDRDY event

`pub fn endrx(&self) -> R<bool, ENDRX_A>`[src]

Bit 4 - Write '1' to Enable interrupt for ENDRX event

`pub fn txdrdy(&self) -> R<bool, TXDRDY_A>`[src]

Bit 7 - Write '1' to Enable interrupt for TXDRDY event

`pub fn endtx(&self) -> R<bool, ENDTX_A>`[src]

Bit 8 - Write '1' to Enable interrupt for ENDTX event

`pub fn error(&self) -> R<bool, ERROR_A>`[src]

Bit 9 - Write '1' to Enable interrupt for ERROR event

`pub fn rxto(&self) -> R<bool, RXTO_A>`[src]

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn cts(&self) -> R<bool, CTS_A>`[src]

Bit 0 - Write '1' to Disable interrupt for CTS event

`pub fn ncts(&self) -> R<bool, NCTS_A>`[src]

Bit 1 - Write '1' to Disable interrupt for NCTS event

`pub fn rxdrdy(&self) -> R<bool, RXDRDY_A>`[src]

Bit 2 - Write '1' to Disable interrupt for RXDRDY event

`pub fn endrx(&self) -> R<bool, ENDRX_A>`[src]

Bit 4 - Write '1' to Disable interrupt for ENDRX event

`pub fn txdrdy(&self) -> R<bool, TXDRDY_A>`[src]

Bit 7 - Write '1' to Disable interrupt for TXDRDY event

`pub fn endtx(&self) -> R<bool, ENDTX_A>`[src]

Bit 8 - Write '1' to Disable interrupt for ENDTX event

`pub fn error(&self) -> R<bool, ERROR_A>`[src]

Bit 9 - Write '1' to Disable interrupt for ERROR event

`pub fn rxto(&self) -> R<bool, RXTO_A>`[src]

`pub fn break_(&self) -> R<bool, BREAK_A>`[src]

Bit 3 - Break condition

`impl R<u8, ENABLE_A>`[src]

`pub fn variant(&self) -> Variant<u8, ENABLE_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _ENABLE>>`[src]

`pub fn enable(&self) -> R<u8, ENABLE_A>`[src]

Bits 0:3 - Enable or disable UARTE

`impl R<u32, BAUDRATE_A>`[src]

`pub fn variant(&self) -> Variant<u32, BAUDRATE_A>`[src]

Get enumerated values variant

`pub fn is_baud1200(&self) -> bool`[src]

Checks if the value of the field is BAUD1200

`pub fn is_baud2400(&self) -> bool`[src]

Checks if the value of the field is BAUD2400

`pub fn is_baud4800(&self) -> bool`[src]

Checks if the value of the field is BAUD4800

`pub fn is_baud9600(&self) -> bool`[src]

Checks if the value of the field is BAUD9600

`pub fn is_baud14400(&self) -> bool`[src]

Checks if the value of the field is BAUD14400

`pub fn is_baud19200(&self) -> bool`[src]

Checks if the value of the field is BAUD19200

`pub fn is_baud28800(&self) -> bool`[src]

Checks if the value of the field is BAUD28800

`pub fn is_baud31250(&self) -> bool`[src]

Checks if the value of the field is BAUD31250

`pub fn is_baud38400(&self) -> bool`[src]

Checks if the value of the field is BAUD38400

`pub fn is_baud56000(&self) -> bool`[src]

Checks if the value of the field is BAUD56000

`pub fn is_baud57600(&self) -> bool`[src]

Checks if the value of the field is BAUD57600

`pub fn is_baud76800(&self) -> bool`[src]

Checks if the value of the field is BAUD76800

`pub fn is_baud115200(&self) -> bool`[src]

Checks if the value of the field is BAUD115200

`pub fn is_baud230400(&self) -> bool`[src]

Checks if the value of the field is BAUD230400

`pub fn is_baud250000(&self) -> bool`[src]

Checks if the value of the field is BAUD250000

`pub fn is_baud460800(&self) -> bool`[src]

Checks if the value of the field is BAUD460800

`pub fn is_baud921600(&self) -> bool`[src]

Checks if the value of the field is BAUD921600

`pub fn is_baud1m(&self) -> bool`[src]

Checks if the value of the field is BAUD1M

`impl R<u32, Reg<u32, _BAUDRATE>>`[src]

`pub fn baudrate(&self) -> R<u32, BAUDRATE_A>`[src]

Bits 0:31 - Baud rate

`impl R<bool, HWFC_A>`[src]

`pub fn variant(&self) -> HWFC_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u8, PARITY_A>`[src]

`pub fn variant(&self) -> Variant<u8, PARITY_A>`[src]

Get enumerated values variant

`pub fn is_excluded(&self) -> bool`[src]

Checks if the value of the field is EXCLUDED

`pub fn is_included(&self) -> bool`[src]

Checks if the value of the field is INCLUDED

`impl R<u32, Reg<u32, _CONFIG>>`[src]

`pub fn hwfc(&self) -> R<bool, HWFC_A>`[src]

Bit 0 - Hardware flow control

`pub fn parity(&self) -> R<u8, PARITY_A>`[src]

Bits 1:3 - Parity

`impl R<bool, CTS_STARTRX_A>`[src]

`pub fn variant(&self) -> CTS_STARTRX_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, NCTS_STOPRX_A>`[src]

`pub fn variant(&self) -> NCTS_STOPRX_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn cts(&self) -> R<bool, CTS_A>`[src]

Bit 0 - Write '1' to Enable interrupt for CTS event

`pub fn ncts(&self) -> R<bool, NCTS_A>`[src]

Bit 1 - Write '1' to Enable interrupt for NCTS event

`pub fn rxdrdy(&self) -> R<bool, RXDRDY_A>`[src]

Bit 3 - Break condition

`impl R<u8, ENABLE_A>`[src]

`pub fn variant(&self) -> Variant<u8, ENABLE_A>`[src]

`impl R<u32, Reg<u32, _RXD>>`[src]

`pub fn rxd(&self) -> R<u8, u8>`[src]

Bits 0:7 - RX data received in previous transfers, double buffered

`impl R<u32, BAUDRATE_A>`[src]

`pub fn variant(&self) -> Variant<u32, BAUDRATE_A>`[src]

Get enumerated values variant

`pub fn is_baud1200(&self) -> bool`[src]

Checks if the value of the field is BAUD1200

`pub fn is_baud2400(&self) -> bool`[src]

Checks if the value of the field is BAUD2400

`pub fn is_baud4800(&self) -> bool`[src]

Checks if the value of the field is BAUD4800

`pub fn is_baud9600(&self) -> bool`[src]

Checks if the value of the field is BAUD9600

`pub fn is_baud14400(&self) -> bool`[src]

Checks if the value of the field is BAUD14400

`pub fn is_baud19200(&self) -> bool`[src]

Checks if the value of the field is BAUD19200

`pub fn is_baud28800(&self) -> bool`[src]

Checks if the value of the field is BAUD28800

`pub fn is_baud31250(&self) -> bool`[src]

Checks if the value of the field is BAUD31250

`pub fn is_baud38400(&self) -> bool`[src]

Checks if the value of the field is BAUD38400

`pub fn is_baud56000(&self) -> bool`[src]

Checks if the value of the field is BAUD56000

`pub fn is_baud57600(&self) -> bool`[src]

Checks if the value of the field is BAUD57600

`pub fn is_baud76800(&self) -> bool`[src]

Checks if the value of the field is BAUD76800

`pub fn is_baud115200(&self) -> bool`[src]

Checks if the value of the field is BAUD115200

`pub fn is_baud230400(&self) -> bool`[src]

Checks if the value of the field is BAUD230400

`pub fn is_baud250000(&self) -> bool`[src]

Checks if the value of the field is BAUD250000

`pub fn is_baud460800(&self) -> bool`[src]

Checks if the value of the field is BAUD460800

`pub fn is_baud921600(&self) -> bool`[src]

Checks if the value of the field is BAUD921600

`pub fn is_baud1m(&self) -> bool`[src]

Checks if the value of the field is BAUD1M

`impl R<u32, Reg<u32, _BAUDRATE>>`[src]

`pub fn baudrate(&self) -> R<u32, BAUDRATE_A>`[src]

Bits 0:31 - Baud rate

`impl R<bool, HWFC_A>`[src]

`pub fn variant(&self) -> HWFC_A`[src]

`impl R<u32, Reg<u32, _MISO>>`[src]

`pub fn pin(&self) -> R<u8, u8>`[src]

Bits 0:4 - Pin number

`pub fn connect(&self) -> R<bool, CONNECT_A>`[src]

Bit 31 - Connection

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Data pointer

`impl R<u32, Reg<u32, _MAXCNT>>`[src]

`pub fn maxcnt(&self) -> R<u8, u8>`[src]

Bits 0:7 - Maximum number of bytes in receive buffer

`impl R<u32, Reg<u32, _AMOUNT>>`[src]

`pub fn amount(&self) -> R<u8, u8>`[src]

Bits 0:7 - Number of bytes transferred in the last transaction

`impl R<u8, LIST_A>`[src]

`pub fn variant(&self) -> Variant<u8, LIST_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_array_list(&self) -> bool`[src]

Checks if the value of the field is ARRAYLIST

`impl R<u32, Reg<u32, _LIST>>`[src]

`pub fn list(&self) -> R<u8, LIST_A>`[src]

Bits 0:2 - List type

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Data pointer

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, ENDRX_A>`[src]

`pub fn variant(&self) -> ENDRX_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, END_A>`[src]

`pub fn variant(&self) -> END_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, ENDTX_A>`[src]

`pub fn variant(&self) -> ENDTX_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, STARTED_A>`[src]

`pub fn variant(&self) -> STARTED_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 1 - Write '1' to Enable interrupt for STOPPED event

`pub fn endrx(&self) -> R<bool, ENDRX_A>`[src]

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 1 - Write '1' to Disable interrupt for STOPPED event

`pub fn endrx(&self) -> R<bool, ENDRX_A>`[src]

Bit 4 - Write '1' to Disable interrupt for ENDRX event

`pub fn end(&self) -> R<bool, END_A>`[src]

Bit 6 - Write '1' to Disable interrupt for END event

`pub fn endtx(&self) -> R<bool, ENDTX_A>`[src]

Bit 8 - Write '1' to Disable interrupt for ENDTX event

`pub fn started(&self) -> R<bool, STARTED_A>`[src]

Bit 19 - Write '1' to Disable interrupt for STARTED event

`impl R<u8, ENABLE_A>`[src]

`pub fn variant(&self) -> Variant<u8, ENABLE_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _ENABLE>>`[src]

`pub fn enable(&self) -> R<u8, ENABLE_A>`[src]

Bits 0:3 - Enable or disable SPIM

`impl R<u32, FREQUENCY_A>`[src]

`pub fn variant(&self) -> Variant<u32, FREQUENCY_A>`[src]

Get enumerated values variant

`pub fn is_k125(&self) -> bool`[src]

Checks if the value of the field is K125

`pub fn is_k250(&self) -> bool`[src]

Checks if the value of the field is K250

`pub fn is_k500(&self) -> bool`[src]

Checks if the value of the field is K500

`pub fn is_m1(&self) -> bool`[src]

Checks if the value of the field is M1

`pub fn is_m2(&self) -> bool`[src]

Checks if the value of the field is M2

`pub fn is_m4(&self) -> bool`[src]

Checks if the value of the field is M4

`pub fn is_m8(&self) -> bool`[src]

Checks if the value of the field is M8

`impl R<u32, Reg<u32, _FREQUENCY>>`[src]

`pub fn frequency(&self) -> R<u32, FREQUENCY_A>`[src]

Bits 0:31 - SPI master data rate

`impl R<bool, ORDER_A>`[src]

`pub fn variant(&self) -> ORDER_A`[src]

Get enumerated values variant

`pub fn is_msb_first(&self) -> bool`[src]

Checks if the value of the field is MSBFIRST

`pub fn is_lsb_first(&self) -> bool`[src]

Checks if the value of the field is LSBFIRST

`impl R<bool, CPHA_A>`[src]

`pub fn variant(&self) -> CPHA_A`[src]

Get enumerated values variant

`pub fn is_leading(&self) -> bool`[src]

Checks if the value of the field is LEADING

`pub fn is_trailing(&self) -> bool`[src]

Checks if the value of the field is TRAILING

`impl R<bool, CPOL_A>`[src]

`pub fn variant(&self) -> CPOL_A`[src]

Get enumerated values variant

`pub fn is_active_high(&self) -> bool`[src]

Checks if the value of the field is ACTIVEHIGH

`pub fn is_active_low(&self) -> bool`[src]

Checks if the value of the field is ACTIVELOW

`impl R<u32, Reg<u32, _CONFIG>>`[src]

`pub fn order(&self) -> R<bool, ORDER_A>`[src]

Bit 0 - Bit order

`pub fn cpha(&self) -> R<bool, CPHA_A>`[src]

Bit 1 - Serial clock (SCK) phase

`pub fn cpol(&self) -> R<bool, CPOL_A>`[src]

Bit 2 - Serial clock (SCK) polarity

Bits 0:4 - Pin number

`pub fn connect(&self) -> R<bool, CONNECT_A>`[src]

Bit 31 - Connection

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - RXD data pointer

`impl R<u32, Reg<u32, _MAXCNT>>`[src]

`pub fn maxcnt(&self) -> R<u8, u8>`[src]

Bits 0:7 - Maximum number of bytes in receive buffer

`impl R<u32, Reg<u32, _AMOUNT>>`[src]

`pub fn amount(&self) -> R<u8, u8>`[src]

Bits 0:7 - Number of bytes received in the last granted transaction

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - TXD data pointer

`impl R<u32, Reg<u32, _MAXCNT>>`[src]

`pub fn maxcnt(&self) -> R<u8, u8>`[src]

Bits 0:7 - Maximum number of bytes in transmit buffer

`impl R<u32, Reg<u32, _AMOUNT>>`[src]

`pub fn amount(&self) -> R<u8, u8>`[src]

Bits 0:7 - Number of bytes transmitted in last granted transaction

`impl R<bool, END_ACQUIRE_A>`[src]

`pub fn variant(&self) -> END_ACQUIRE_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

Bit 4 - Write '1' to Disable interrupt for ENDRX event

`pub fn acquired(&self) -> R<bool, ACQUIRED_A>`[src]

Bit 10 - Write '1' to Disable interrupt for ACQUIRED event

`impl R<u8, SEMSTAT_A>`[src]

`pub fn variant(&self) -> SEMSTAT_A`[src]

Get enumerated values variant

`pub fn is_free(&self) -> bool`[src]

Checks if the value of the field is FREE

`pub fn is_cpu(&self) -> bool`[src]

Checks if the value of the field is CPU

`pub fn is_spis(&self) -> bool`[src]

Checks if the value of the field is SPIS

`pub fn is_cpupending(&self) -> bool`[src]

Checks if the value of the field is CPUPENDING

`impl R<u32, Reg<u32, _SEMSTAT>>`[src]

`pub fn semstat(&self) -> R<u8, SEMSTAT_A>`[src]

Bits 0:1 - Semaphore status

`impl R<bool, OVERREAD_A>`[src]

`pub fn variant(&self) -> OVERREAD_A`[src]

Get enumerated values variant

`pub fn is_not_present(&self) -> bool`[src]

Checks if the value of the field is NOTPRESENT

`pub fn is_present(&self) -> bool`[src]

Checks if the value of the field is PRESENT

`impl R<bool, OVERFLOW_A>`[src]

`pub fn variant(&self) -> OVERFLOW_A`[src]

Get enumerated values variant

`pub fn is_not_present(&self) -> bool`[src]

Checks if the value of the field is NOTPRESENT

`pub fn is_present(&self) -> bool`[src]

Checks if the value of the field is PRESENT

`impl R<u32, Reg<u32, _STATUS>>`[src]

`pub fn overread(&self) -> R<bool, OVERREAD_A>`[src]

Bit 0 - TX buffer over-read detected, and prevented

`pub fn overflow(&self) -> R<bool, OVERFLOW_A>`[src]

Bit 1 - RX buffer overflow detected, and prevented

`impl R<u8, ENABLE_A>`[src]

`pub fn variant(&self) -> Variant<u8, ENABLE_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _ENABLE>>`[src]

`pub fn enable(&self) -> R<u8, ENABLE_A>`[src]

Bits 0:3 - Enable or disable SPI slave

`impl R<bool, ORDER_A>`[src]

`pub fn variant(&self) -> ORDER_A`[src]

Get enumerated values variant

`pub fn is_msb_first(&self) -> bool`[src]

Checks if the value of the field is MSBFIRST

`pub fn is_lsb_first(&self) -> bool`[src]

Checks if the value of the field is LSBFIRST

`impl R<bool, CPHA_A>`[src]

`pub fn variant(&self) -> CPHA_A`[src]

Get enumerated values variant

`pub fn is_leading(&self) -> bool`[src]

Checks if the value of the field is LEADING

`pub fn is_trailing(&self) -> bool`[src]

Checks if the value of the field is TRAILING

`impl R<bool, CPOL_A>`[src]

`pub fn variant(&self) -> CPOL_A`[src]

Get enumerated values variant

`pub fn is_active_high(&self) -> bool`[src]

Checks if the value of the field is ACTIVEHIGH

`pub fn is_active_low(&self) -> bool`[src]

Checks if the value of the field is ACTIVELOW

`impl R<u32, Reg<u32, _CONFIG>>`[src]

`pub fn order(&self) -> R<bool, ORDER_A>`[src]

Bit 0 - Bit order

`pub fn cpha(&self) -> R<bool, CPHA_A>`[src]

Bit 1 - Serial clock (SCK) phase

`pub fn cpol(&self) -> R<bool, CPOL_A>`[src]

Bit 2 - Serial clock (SCK) polarity

`impl R<u32, Reg<u32, _DEF>>`[src]

`pub fn def(&self) -> R<u8, u8>`[src]

Bits 0:7 - Default character. Character clocked out in case of an ignored transaction.

`impl R<u32, Reg<u32, _ORC>>`[src]

`pub fn orc(&self) -> R<u8, u8>`[src]

Bits 0:7 - Over-read character. Character clocked out after an over-read of the transmit buffer.

`impl R<bool, CONNECT_A>`[src]

`pub fn variant(&self) -> CONNECT_A`[src]

Get enumerated values variant

`pub fn is_disconnected(&self) -> bool`[src]

Checks if the value of the field is DISCONNECTED

`pub fn is_connected(&self) -> bool`[src]

Checks if the value of the field is CONNECTED

`impl R<u32, Reg<u32, _SCL>>`[src]

`pub fn pin(&self) -> R<u8, u8>`[src]

Bits 0:4 - Pin number

`pub fn connect(&self) -> R<bool, CONNECT_A>`[src]

Bit 31 - Connection

`impl R<bool, CONNECT_A>`[src]

`pub fn variant(&self) -> CONNECT_A`[src]

Get enumerated values variant

`pub fn is_disconnected(&self) -> bool`[src]

Checks if the value of the field is DISCONNECTED

`pub fn is_connected(&self) -> bool`[src]

Checks if the value of the field is CONNECTED

`impl R<u32, Reg<u32, _SDA>>`[src]

`pub fn pin(&self) -> R<u8, u8>`[src]

Bits 0:4 - Pin number

`pub fn connect(&self) -> R<bool, CONNECT_A>`[src]

Bit 31 - Connection

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Data pointer

`impl R<u32, Reg<u32, _MAXCNT>>`[src]

`pub fn maxcnt(&self) -> R<u8, u8>`[src]

Bits 0:7 - Maximum number of bytes in receive buffer

`impl R<u32, Reg<u32, _AMOUNT>>`[src]

`pub fn amount(&self) -> R<u8, u8>`[src]

Bits 0:7 - Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte.

`impl R<u8, LIST_A>`[src]

`pub fn variant(&self) -> Variant<u8, LIST_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_array_list(&self) -> bool`[src]

Checks if the value of the field is ARRAYLIST

`impl R<u32, Reg<u32, _LIST>>`[src]

`pub fn list(&self) -> R<u8, LIST_A>`[src]

Bits 0:2 - List type

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Data pointer

`impl R<u32, Reg<u32, _MAXCNT>>`[src]

`pub fn maxcnt(&self) -> R<u8, u8>`[src]

Bits 0:7 - Maximum number of bytes in transmit buffer

`impl R<u32, Reg<u32, _AMOUNT>>`[src]

`pub fn amount(&self) -> R<u8, u8>`[src]

Bits 0:7 - Number of bytes transferred in the last transaction. In case of NACK error, includes the NACK'ed byte.

`impl R<u8, LIST_A>`[src]

`pub fn variant(&self) -> Variant<u8, LIST_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_array_list(&self) -> bool`[src]

Checks if the value of the field is ARRAYLIST

`impl R<u32, Reg<u32, _INTEN>>`[src]

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 1 - Enable or disable interrupt for STOPPED event

`pub fn error(&self) -> R<bool, ERROR_A>`[src]

Bit 9 - Enable or disable interrupt for ERROR event

`pub fn suspended(&self) -> R<bool, SUSPENDED_A>`[src]

Bit 18 - Enable or disable interrupt for SUSPENDED event

`pub fn rxstarted(&self) -> R<bool, RXSTARTED_A>`[src]

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 1 - Write '1' to Enable interrupt for STOPPED event

`pub fn error(&self) -> R<bool, ERROR_A>`[src]

Bit 9 - Write '1' to Enable interrupt for ERROR event

`pub fn suspended(&self) -> R<bool, SUSPENDED_A>`[src]

Bit 18 - Write '1' to Enable interrupt for SUSPENDED event

`pub fn rxstarted(&self) -> R<bool, RXSTARTED_A>`[src]

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 1 - Write '1' to Disable interrupt for STOPPED event

`pub fn error(&self) -> R<bool, ERROR_A>`[src]

Bit 9 - Write '1' to Disable interrupt for ERROR event

`pub fn suspended(&self) -> R<bool, SUSPENDED_A>`[src]

Bit 18 - Write '1' to Disable interrupt for SUSPENDED event

`pub fn rxstarted(&self) -> R<bool, RXSTARTED_A>`[src]

`impl R<u32, Reg<u32, _ENABLE>>`[src]

`pub fn enable(&self) -> R<u8, ENABLE_A>`[src]

Bits 0:3 - Enable or disable TWIM

`impl R<u32, FREQUENCY_A>`[src]

`pub fn variant(&self) -> Variant<u32, FREQUENCY_A>`[src]

Get enumerated values variant

`pub fn is_k100(&self) -> bool`[src]

Checks if the value of the field is K100

`pub fn is_k250(&self) -> bool`[src]

Checks if the value of the field is K250

`pub fn is_k400(&self) -> bool`[src]

Checks if the value of the field is K400

`impl R<u32, Reg<u32, _FREQUENCY>>`[src]

`pub fn frequency(&self) -> R<u32, FREQUENCY_A>`[src]

Bits 0:31 - TWI master clock frequency

`impl R<u32, Reg<u32, _ADDRESS>>`[src]

`pub fn address(&self) -> R<u8, u8>`[src]

Bits 0:6 - Address used in the TWI transfer

`impl R<bool, CONNECT_A>`[src]

`pub fn variant(&self) -> CONNECT_A`[src]

Get enumerated values variant

`pub fn is_disconnected(&self) -> bool`[src]

Checks if the value of the field is DISCONNECTED

`pub fn is_connected(&self) -> bool`[src]

Checks if the value of the field is CONNECTED

`impl R<u32, Reg<u32, _SCL>>`[src]

`pub fn pin(&self) -> R<u8, u8>`[src]

Bits 0:4 - Pin number

`pub fn connect(&self) -> R<bool, CONNECT_A>`[src]

Bit 31 - Connection

`impl R<bool, CONNECT_A>`[src]

`pub fn variant(&self) -> CONNECT_A`[src]

Get enumerated values variant

`pub fn is_disconnected(&self) -> bool`[src]

Checks if the value of the field is DISCONNECTED

`pub fn is_connected(&self) -> bool`[src]

Checks if the value of the field is CONNECTED

`impl R<u32, Reg<u32, _SDA>>`[src]

`pub fn pin(&self) -> R<u8, u8>`[src]

Bits 0:4 - Pin number

`pub fn connect(&self) -> R<bool, CONNECT_A>`[src]

Bit 31 - Connection

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - RXD Data pointer

`impl R<u32, Reg<u32, _MAXCNT>>`[src]

`pub fn maxcnt(&self) -> R<u8, u8>`[src]

Bits 0:7 - Maximum number of bytes in RXD buffer

`impl R<u32, Reg<u32, _AMOUNT>>`[src]

`pub fn amount(&self) -> R<u8, u8>`[src]

Bits 0:7 - Number of bytes transferred in the last RXD transaction

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - TXD Data pointer

`impl R<u32, Reg<u32, _MAXCNT>>`[src]

`pub fn maxcnt(&self) -> R<u8, u8>`[src]

Bits 0:7 - Maximum number of bytes in TXD buffer

`impl R<u32, Reg<u32, _AMOUNT>>`[src]

`pub fn amount(&self) -> R<u8, u8>`[src]

Bits 0:7 - Number of bytes transferred in the last TXD transaction

`impl R<bool, WRITE_SUSPEND_A>`[src]

`pub fn variant(&self) -> WRITE_SUSPEND_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, READ_SUSPEND_A>`[src]

`pub fn variant(&self) -> READ_SUSPEND_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTEN>>`[src]

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 1 - Enable or disable interrupt for STOPPED event

`pub fn error(&self) -> R<bool, ERROR_A>`[src]

Bit 9 - Enable or disable interrupt for ERROR event

`pub fn rxstarted(&self) -> R<bool, RXSTARTED_A>`[src]

Bit 20 - Write '1' to Disable interrupt for TXSTARTED event

`pub fn write(&self) -> R<bool, WRITE_A>`[src]

Bit 25 - Write '1' to Disable interrupt for WRITE event

`pub fn read(&self) -> R<bool, READ_A>`[src]

Bit 26 - Write '1' to Disable interrupt for READ event

`impl R<bool, OVERFLOW_A>`[src]

`pub fn variant(&self) -> OVERFLOW_A`[src]

Get enumerated values variant

`pub fn is_not_detected(&self) -> bool`[src]

Checks if the value of the field is NOTDETECTED

`pub fn is_detected(&self) -> bool`[src]

Checks if the value of the field is DETECTED

`impl R<bool, DNACK_A>`[src]

`pub fn variant(&self) -> DNACK_A`[src]

Get enumerated values variant

`pub fn is_not_received(&self) -> bool`[src]

Checks if the value of the field is NOTRECEIVED

`pub fn is_received(&self) -> bool`[src]

Checks if the value of the field is RECEIVED

`impl R<bool, OVERREAD_A>`[src]

`pub fn variant(&self) -> OVERREAD_A`[src]

Get enumerated values variant

`pub fn is_not_detected(&self) -> bool`[src]

Checks if the value of the field is NOTDETECTED

`pub fn is_detected(&self) -> bool`[src]

Checks if the value of the field is DETECTED

`impl R<u32, Reg<u32, _ERRORSRC>>`[src]

`pub fn overflow(&self) -> R<bool, OVERFLOW_A>`[src]

Bit 0 - RX buffer overflow detected, and prevented

`pub fn dnack(&self) -> R<bool, DNACK_A>`[src]

Bit 2 - NACK sent after receiving a data byte

`pub fn overread(&self) -> R<bool, OVERREAD_A>`[src]

Bit 3 - TX buffer over-read detected, and prevented

`impl R<u32, Reg<u32, _MATCH>>`[src]

`pub fn match_(&self) -> R<bool, bool>`[src]

Bit 0 - Which of the addresses in {ADDRESS} matched the incoming address

`impl R<u8, ENABLE_A>`[src]

`pub fn variant(&self) -> Variant<u8, ENABLE_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _ENABLE>>`[src]

`pub fn enable(&self) -> R<u8, ENABLE_A>`[src]

Bits 0:3 - Enable or disable TWIS

`impl R<u32, Reg<u32, _ADDRESS>>`[src]

`pub fn address(&self) -> R<u8, u8>`[src]

Bits 0:6 - TWI slave address

`impl R<bool, ADDRESS0_A>`[src]

`pub fn variant(&self) -> ADDRESS0_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, ADDRESS1_A>`[src]

`pub fn variant(&self) -> ADDRESS1_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _CONFIG>>`[src]

`pub fn address0(&self) -> R<bool, ADDRESS0_A>`[src]

Bit 0 - Enable or disable address matching on ADDRESS[0]

`pub fn address1(&self) -> R<bool, ADDRESS1_A>`[src]

Bit 1 - Enable or disable address matching on ADDRESS[1]

`impl R<u32, Reg<u32, _ORC>>`[src]

`pub fn orc(&self) -> R<u8, u8>`[src]

Bits 0:7 - Over-read character. Character sent out in case of an over-read of the transmit buffer.

`impl R<u32, PSELSCK_A>`[src]

`pub fn variant(&self) -> Variant<u32, PSELSCK_A>`[src]

Get enumerated values variant

`pub fn is_disconnected(&self) -> bool`[src]

Checks if the value of the field is DISCONNECTED

`impl R<u32, Reg<u32, _SCK>>`[src]

`pub fn pselsck(&self) -> R<u32, PSELSCK_A>`[src]

Bits 0:31 - Pin number configuration for SPI SCK signal

`impl R<u32, PSELMOSI_A>`[src]

`pub fn variant(&self) -> Variant<u32, PSELMOSI_A>`[src]

Get enumerated values variant

`pub fn is_disconnected(&self) -> bool`[src]

Checks if the value of the field is DISCONNECTED

`impl R<u32, Reg<u32, _MOSI>>`[src]

`pub fn pselmosi(&self) -> R<u32, PSELMOSI_A>`[src]

Bits 0:31 - Pin number configuration for SPI MOSI signal

Bits 0:7 - RX data received. Double buffered

`impl R<u32, Reg<u32, _TXD>>`[src]

`pub fn txd(&self) -> R<u8, u8>`[src]

Bits 0:7 - TX data to send. Double buffered

`impl R<u32, FREQUENCY_A>`[src]

`pub fn variant(&self) -> Variant<u32, FREQUENCY_A>`[src]

Get enumerated values variant

`pub fn is_k125(&self) -> bool`[src]

Checks if the value of the field is K125

`pub fn is_k250(&self) -> bool`[src]

Checks if the value of the field is K250

`pub fn is_k500(&self) -> bool`[src]

Checks if the value of the field is K500

`pub fn is_m1(&self) -> bool`[src]

Checks if the value of the field is M1

`pub fn is_m2(&self) -> bool`[src]

Checks if the value of the field is M2

`pub fn is_m4(&self) -> bool`[src]

Checks if the value of the field is M4

`pub fn is_m8(&self) -> bool`[src]

Checks if the value of the field is M8

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 1 - Write '1' to Enable interrupt for STOPPED event

`pub fn rxdready(&self) -> R<bool, RXDREADY_A>`[src]

Bit 2 - Write '1' to Enable interrupt for RXDREADY event

`pub fn txdsent(&self) -> R<bool, TXDSENT_A>`[src]

`impl R<u32, Reg<u32, _RXD>>`[src]

`pub fn rxd(&self) -> R<u8, u8>`[src]

Bits 0:7 - RXD register

`impl R<u32, Reg<u32, _TXD>>`[src]

`pub fn txd(&self) -> R<u8, u8>`[src]

Bits 0:7 - TXD register

`impl R<u32, FREQUENCY_A>`[src]

`pub fn variant(&self) -> Variant<u32, FREQUENCY_A>`[src]

Get enumerated values variant

`pub fn is_k100(&self) -> bool`[src]

Checks if the value of the field is K100

`pub fn is_k250(&self) -> bool`[src]

Checks if the value of the field is K250

`pub fn is_k400(&self) -> bool`[src]

Checks if the value of the field is K400

`impl R<u32, Reg<u32, _FREQUENCY>>`[src]

`pub fn frequency(&self) -> R<u32, FREQUENCY_A>`[src]

Bits 0:31 - TWI master clock frequency

Checks if the value of the field is NOCRCTX

`pub fn is_crc16tx(&self) -> bool`[src]

Checks if the value of the field is CRC16TX

`impl R<u32, Reg<u32, _FRAMECONFIG>>`[src]

`pub fn parity(&self) -> R<bool, PARITY_A>`[src]

Bit 0 - Adding parity or not in the frame

`pub fn discardmode(&self) -> R<bool, DISCARDMODE_A>`[src]

Bit 1 - Discarding unused bits in start or at end of a Frame

`pub fn sof(&self) -> R<bool, SOF_A>`[src]

Bit 2 - Adding SoF or not in TX frames

`pub fn crcmodetx(&self) -> R<bool, CRCMODETX_A>`[src]

Bit 4 - CRC mode for outgoing frames

`impl R<u32, Reg<u32, _AMOUNT>>`[src]

`pub fn txdatabits(&self) -> R<u8, u8>`[src]

Bits 0:2 - Number of bits in the last or first byte read from RAM that shall be included in the frame (excluding parity bit).

`pub fn txdatabytes(&self) -> R<u16, u16>`[src]

Bits 3:11 - Number of complete bytes that shall be included in the frame, excluding CRC, parity and framing

`impl R<bool, PARITY_A>`[src]

`pub fn variant(&self) -> PARITY_A`[src]

Get enumerated values variant

`pub fn is_no_parity(&self) -> bool`[src]

Checks if the value of the field is NOPARITY

`pub fn is_parity(&self) -> bool`[src]

Checks if the value of the field is PARITY

`impl R<bool, SOF_A>`[src]

`pub fn variant(&self) -> SOF_A`[src]

Get enumerated values variant

`pub fn is_no_so_f(&self) -> bool`[src]

Checks if the value of the field is NOSOF

`pub fn is_so_f(&self) -> bool`[src]

Checks if the value of the field is SOF

`impl R<bool, CRCMODERX_A>`[src]

`pub fn variant(&self) -> CRCMODERX_A`[src]

Get enumerated values variant

`pub fn is_no_crcrx(&self) -> bool`[src]

Checks if the value of the field is NOCRCRX

`pub fn is_crc16rx(&self) -> bool`[src]

Checks if the value of the field is CRC16RX

`impl R<u32, Reg<u32, _FRAMECONFIG>>`[src]

`pub fn parity(&self) -> R<bool, PARITY_A>`[src]

Bit 0 - Parity expected or not in RX frame

`pub fn sof(&self) -> R<bool, SOF_A>`[src]

Bit 2 - SoF expected or not in RX frames

`pub fn crcmoderx(&self) -> R<bool, CRCMODERX_A>`[src]

Bit 4 - CRC mode for incoming frames

`impl R<u32, Reg<u32, _AMOUNT>>`[src]

`pub fn rxdatabits(&self) -> R<u8, u8>`[src]

Bits 0:2 - Number of bits in the last byte in the frame, if less than 8 (including CRC, but excluding parity and SoF/EoF framing).

`pub fn rxdatabytes(&self) -> R<u16, u16>`[src]

Bits 3:11 - Number of complete bytes received in the frame (including CRC, but excluding parity and SoF/EoF framing)

`impl R<bool, FIELDDETECTED_ACTIVATE_A>`[src]

`pub fn variant(&self) -> FIELDDETECTED_ACTIVATE_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, FIELDLOST_SENSE_A>`[src]

`pub fn variant(&self) -> FIELDLOST_SENSE_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

Bit 0 - Enable or disable interrupt for READY event

`pub fn fielddetected(&self) -> R<bool, FIELDDETECTED_A>`[src]

Bit 1 - Enable or disable interrupt for FIELDDETECTED event

`pub fn fieldlost(&self) -> R<bool, FIELDLOST_A>`[src]

Bit 2 - Enable or disable interrupt for FIELDLOST event

`pub fn txframestart(&self) -> R<bool, TXFRAMESTART_A>`[src]

Bit 3 - Enable or disable interrupt for TXFRAMESTART event

`pub fn txframeend(&self) -> R<bool, TXFRAMEEND_A>`[src]

Bit 4 - Enable or disable interrupt for TXFRAMEEND event

`pub fn rxframestart(&self) -> R<bool, RXFRAMESTART_A>`[src]

Bit 5 - Enable or disable interrupt for RXFRAMESTART event

`pub fn rxframeend(&self) -> R<bool, RXFRAMEEND_A>`[src]

Bit 6 - Enable or disable interrupt for RXFRAMEEND event

`pub fn error(&self) -> R<bool, ERROR_A>`[src]

Bit 7 - Enable or disable interrupt for ERROR event

`pub fn rxerror(&self) -> R<bool, RXERROR_A>`[src]

Bit 10 - Enable or disable interrupt for RXERROR event

`pub fn endrx(&self) -> R<bool, ENDRX_A>`[src]

Bit 11 - Enable or disable interrupt for ENDRX event

`pub fn endtx(&self) -> R<bool, ENDTX_A>`[src]

Bit 12 - Enable or disable interrupt for ENDTX event

`pub fn autocolresstarted(&self) -> R<bool, AUTOCOLRESSTARTED_A>`[src]

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn ready(&self) -> R<bool, READY_A>`[src]

Bit 0 - Write '1' to Enable interrupt for READY event

`pub fn fielddetected(&self) -> R<bool, FIELDDETECTED_A>`[src]

Bit 1 - Write '1' to Enable interrupt for FIELDDETECTED event

`pub fn fieldlost(&self) -> R<bool, FIELDLOST_A>`[src]

Bit 2 - Write '1' to Enable interrupt for FIELDLOST event

`pub fn txframestart(&self) -> R<bool, TXFRAMESTART_A>`[src]

Bit 3 - Write '1' to Enable interrupt for TXFRAMESTART event

`pub fn txframeend(&self) -> R<bool, TXFRAMEEND_A>`[src]

Bit 4 - Write '1' to Enable interrupt for TXFRAMEEND event

`pub fn rxframestart(&self) -> R<bool, RXFRAMESTART_A>`[src]

Bit 5 - Write '1' to Enable interrupt for RXFRAMESTART event

`pub fn rxframeend(&self) -> R<bool, RXFRAMEEND_A>`[src]

Bit 6 - Write '1' to Enable interrupt for RXFRAMEEND event

`pub fn error(&self) -> R<bool, ERROR_A>`[src]

Bit 7 - Write '1' to Enable interrupt for ERROR event

`pub fn rxerror(&self) -> R<bool, RXERROR_A>`[src]

Bit 10 - Write '1' to Enable interrupt for RXERROR event

`pub fn endrx(&self) -> R<bool, ENDRX_A>`[src]

Bit 11 - Write '1' to Enable interrupt for ENDRX event

`pub fn endtx(&self) -> R<bool, ENDTX_A>`[src]

Bit 12 - Write '1' to Enable interrupt for ENDTX event

`pub fn autocolresstarted(&self) -> R<bool, AUTOCOLRESSTARTED_A>`[src]

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn ready(&self) -> R<bool, READY_A>`[src]

Bit 0 - Write '1' to Disable interrupt for READY event

`pub fn fielddetected(&self) -> R<bool, FIELDDETECTED_A>`[src]

Bit 1 - Write '1' to Disable interrupt for FIELDDETECTED event

`pub fn fieldlost(&self) -> R<bool, FIELDLOST_A>`[src]

Bit 2 - Write '1' to Disable interrupt for FIELDLOST event

`pub fn txframestart(&self) -> R<bool, TXFRAMESTART_A>`[src]

Bit 3 - Write '1' to Disable interrupt for TXFRAMESTART event

`pub fn txframeend(&self) -> R<bool, TXFRAMEEND_A>`[src]

Bit 4 - Write '1' to Disable interrupt for TXFRAMEEND event

`pub fn rxframestart(&self) -> R<bool, RXFRAMESTART_A>`[src]

Bit 5 - Write '1' to Disable interrupt for RXFRAMESTART event

`pub fn rxframeend(&self) -> R<bool, RXFRAMEEND_A>`[src]

Bit 6 - Write '1' to Disable interrupt for RXFRAMEEND event

`pub fn error(&self) -> R<bool, ERROR_A>`[src]

Bit 7 - Write '1' to Disable interrupt for ERROR event

`pub fn rxerror(&self) -> R<bool, RXERROR_A>`[src]

Bit 10 - Write '1' to Disable interrupt for RXERROR event

`pub fn endrx(&self) -> R<bool, ENDRX_A>`[src]

Bit 11 - Write '1' to Disable interrupt for ENDRX event

`pub fn endtx(&self) -> R<bool, ENDTX_A>`[src]

Bit 12 - Write '1' to Disable interrupt for ENDTX event

`pub fn autocolresstarted(&self) -> R<bool, AUTOCOLRESSTARTED_A>`[src]

Bit 14 - Write '1' to Disable interrupt for AUTOCOLRESSTARTED event

`pub fn collision(&self) -> R<bool, COLLISION_A>`[src]

Bit 18 - Write '1' to Disable interrupt for COLLISION event

`pub fn selected(&self) -> R<bool, SELECTED_A>`[src]

Bit 19 - Write '1' to Disable interrupt for SELECTED event

`pub fn started(&self) -> R<bool, STARTED_A>`[src]

Bit 20 - Write '1' to Disable interrupt for STARTED event

`impl R<u32, Reg<u32, _ERRORSTATUS>>`[src]

`pub fn framedelaytimeout(&self) -> R<bool, bool>`[src]

Bit 0 - No STARTTX task triggered before expiration of the time set in FRAMEDELAYMAX

`pub fn nfcfieldtoostrong(&self) -> R<bool, bool>`[src]

Bit 2 - Field level is too high at max load resistance

`pub fn nfcfieldtooweak(&self) -> R<bool, bool>`[src]

Bit 3 - Field level is too low at min load resistance

`impl R<u32, Reg<u32, _CURRENTLOADCTRL>>`[src]

`pub fn currentloadctrl(&self) -> R<u8, u8>`[src]

Bits 0:5 - Current value driven to the NFC Load Control

`impl R<bool, FIELDPRESENT_A>`[src]

`pub fn variant(&self) -> FIELDPRESENT_A`[src]

Get enumerated values variant

`pub fn is_no_field(&self) -> bool`[src]

Checks if the value of the field is NOFIELD

`pub fn is_field_present(&self) -> bool`[src]

Checks if the value of the field is FIELDPRESENT

`impl R<bool, LOCKDETECT_A>`[src]

`pub fn variant(&self) -> LOCKDETECT_A`[src]

Get enumerated values variant

`pub fn is_not_locked(&self) -> bool`[src]

Checks if the value of the field is NOTLOCKED

`pub fn is_locked(&self) -> bool`[src]

Checks if the value of the field is LOCKED

`impl R<u32, Reg<u32, _FIELDPRESENT>>`[src]

`pub fn fieldpresent(&self) -> R<bool, FIELDPRESENT_A>`[src]

Bit 0 - Indicates the presence or not of a valid field. Available only in the activated state.

`pub fn lockdetect(&self) -> R<bool, LOCKDETECT_A>`[src]

Bit 1 - Indicates if the low level has locked to the field

`impl R<u32, Reg<u32, _FRAMEDELAYMIN>>`[src]

`pub fn framedelaymin(&self) -> R<u16, u16>`[src]

Bits 0:15 - Minimum frame delay in number of 13.56 MHz clocks

`impl R<u32, Reg<u32, _FRAMEDELAYMAX>>`[src]

`pub fn framedelaymax(&self) -> R<u16, u16>`[src]

Bits 0:15 - Maximum frame delay in number of 13.56 MHz clocks

`impl R<u8, FRAMEDELAYMODE_A>`[src]

`pub fn variant(&self) -> FRAMEDELAYMODE_A`[src]

Get enumerated values variant

`pub fn is_free_run(&self) -> bool`[src]

Checks if the value of the field is FREERUN

`pub fn is_window(&self) -> bool`[src]

Checks if the value of the field is WINDOW

`pub fn is_exact_val(&self) -> bool`[src]

Checks if the value of the field is EXACTVAL

`pub fn is_window_grid(&self) -> bool`[src]

Checks if the value of the field is WINDOWGRID

`impl R<u32, Reg<u32, _FRAMEDELAYMODE>>`[src]

`pub fn framedelaymode(&self) -> R<u8, FRAMEDELAYMODE_A>`[src]

Bits 0:1 - Configuration register for the Frame Delay Timer

`impl R<u32, Reg<u32, _PACKETPTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Packet pointer for TXD and RXD data storage in Data RAM. This address is a byte aligned RAM address.

`impl R<u32, Reg<u32, _MAXLEN>>`[src]

`pub fn maxlen(&self) -> R<u16, u16>`[src]

Bits 0:8 - Size of allocated for TXD and RXD data storage buffer in Data RAM

`impl R<u32, Reg<u32, _NFCID1_LAST>>`[src]

`pub fn nfcid1_z(&self) -> R<u8, u8>`[src]

Bits 0:7 - NFCID1 byte Z (very last byte sent)

`pub fn nfcid1_y(&self) -> R<u8, u8>`[src]

Bits 8:15 - NFCID1 byte Y

`pub fn nfcid1_x(&self) -> R<u8, u8>`[src]

Bits 16:23 - NFCID1 byte X

`pub fn nfcid1_w(&self) -> R<u8, u8>`[src]

Bits 24:31 - NFCID1 byte W

`impl R<u32, Reg<u32, _NFCID1_2ND_LAST>>`[src]

`pub fn nfcid1_v(&self) -> R<u8, u8>`[src]

Bits 0:7 - NFCID1 byte V

`pub fn nfcid1_u(&self) -> R<u8, u8>`[src]

Bits 8:15 - NFCID1 byte U

`pub fn nfcid1_t(&self) -> R<u8, u8>`[src]

Bits 16:23 - NFCID1 byte T

`impl R<u32, Reg<u32, _NFCID1_3RD_LAST>>`[src]

`pub fn nfcid1_s(&self) -> R<u8, u8>`[src]

Bits 0:7 - NFCID1 byte S

`pub fn nfcid1_r(&self) -> R<u8, u8>`[src]

Bits 8:15 - NFCID1 byte R

`pub fn nfcid1_q(&self) -> R<u8, u8>`[src]

Bits 16:23 - NFCID1 byte Q

`impl R<u8, BITFRAMESDD_A>`[src]

`pub fn variant(&self) -> Variant<u8, BITFRAMESDD_A>`[src]

Get enumerated values variant

`pub fn is_sdd00000(&self) -> bool`[src]

Checks if the value of the field is SDD00000

`pub fn is_sdd00001(&self) -> bool`[src]

Checks if the value of the field is SDD00001

`pub fn is_sdd00010(&self) -> bool`[src]

Checks if the value of the field is SDD00010

`pub fn is_sdd00100(&self) -> bool`[src]

Checks if the value of the field is SDD00100

`pub fn is_sdd01000(&self) -> bool`[src]

Checks if the value of the field is SDD01000

`pub fn is_sdd10000(&self) -> bool`[src]

Checks if the value of the field is SDD10000

`impl R<u8, NFCIDSIZE_A>`[src]

`pub fn variant(&self) -> Variant<u8, NFCIDSIZE_A>`[src]

Get enumerated values variant

`pub fn is_nfcid1single(&self) -> bool`[src]

Checks if the value of the field is NFCID1SINGLE

`pub fn is_nfcid1double(&self) -> bool`[src]

Checks if the value of the field is NFCID1DOUBLE

`pub fn is_nfcid1triple(&self) -> bool`[src]

Checks if the value of the field is NFCID1TRIPLE

`impl R<u32, Reg<u32, _SENSRES>>`[src]

`pub fn bitframesdd(&self) -> R<u8, BITFRAMESDD_A>`[src]

Bits 0:4 - Bit frame SDD as defined by the b5:b1 of byte 1 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification

`pub fn rfu5(&self) -> R<bool, bool>`[src]

Bit 5 - Reserved for future use. Shall be 0.

`pub fn nfcidsize(&self) -> R<u8, NFCIDSIZE_A>`[src]

Bits 6:7 - NFCID1 size. This value is used by the Auto collision resolution engine.

`pub fn platfconfig(&self) -> R<u8, u8>`[src]

Bits 8:11 - Tag platform configuration as defined by the b4:b1 of byte 2 in SENS_RES response in the NFC Forum, NFC Digital Protocol Technical Specification

`pub fn rfu74(&self) -> R<u8, u8>`[src]

Bits 12:15 - Reserved for future use. Shall be 0.

`impl R<bool, CASCADE_A>`[src]

`pub fn variant(&self) -> CASCADE_A`[src]

Get enumerated values variant

`pub fn is_complete(&self) -> bool`[src]

Checks if the value of the field is COMPLETE

`pub fn is_not_complete(&self) -> bool`[src]

Checks if the value of the field is NOTCOMPLETE

`impl R<u32, Reg<u32, _SELRES>>`[src]

`pub fn rfu10(&self) -> R<u8, u8>`[src]

Bits 0:1 - Reserved for future use. Shall be 0.

`pub fn cascade(&self) -> R<bool, CASCADE_A>`[src]

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn in0(&self) -> R<bool, IN0_A>`[src]

Bit 0 - Write '1' to Enable interrupt for IN[0] event

`pub fn in1(&self) -> R<bool, IN1_A>`[src]

Bit 1 - Write '1' to Enable interrupt for IN[1] event

`pub fn in2(&self) -> R<bool, IN2_A>`[src]

Bit 2 - Write '1' to Enable interrupt for IN[2] event

`pub fn in3(&self) -> R<bool, IN3_A>`[src]

Bit 3 - Write '1' to Enable interrupt for IN[3] event

`pub fn in4(&self) -> R<bool, IN4_A>`[src]

Bit 4 - Write '1' to Enable interrupt for IN[4] event

`pub fn in5(&self) -> R<bool, IN5_A>`[src]

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn in0(&self) -> R<bool, IN0_A>`[src]

Bit 0 - Write '1' to Disable interrupt for IN[0] event

`pub fn in1(&self) -> R<bool, IN1_A>`[src]

Bit 1 - Write '1' to Disable interrupt for IN[1] event

`pub fn in2(&self) -> R<bool, IN2_A>`[src]

Bit 2 - Write '1' to Disable interrupt for IN[2] event

`pub fn in3(&self) -> R<bool, IN3_A>`[src]

Bit 3 - Write '1' to Disable interrupt for IN[3] event

`pub fn in4(&self) -> R<bool, IN4_A>`[src]

Bit 4 - Write '1' to Disable interrupt for IN[4] event

`pub fn in5(&self) -> R<bool, IN5_A>`[src]

Bit 5 - Write '1' to Disable interrupt for IN[5] event

`pub fn in6(&self) -> R<bool, IN6_A>`[src]

Bit 6 - Write '1' to Disable interrupt for IN[6] event

`pub fn in7(&self) -> R<bool, IN7_A>`[src]

Bit 7 - Write '1' to Disable interrupt for IN[7] event

`pub fn port(&self) -> R<bool, PORT_A>`[src]

Bit 31 - Write '1' to Disable interrupt for PORT event

`impl R<u8, MODE_A>`[src]

`pub fn variant(&self) -> Variant<u8, MODE_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_event(&self) -> bool`[src]

Checks if the value of the field is EVENT

`pub fn is_task(&self) -> bool`[src]

Checks if the value of the field is TASK

`impl R<u8, POLARITY_A>`[src]

`pub fn variant(&self) -> POLARITY_A`[src]

Get enumerated values variant

`pub fn is_none(&self) -> bool`[src]

Checks if the value of the field is NONE

`pub fn is_lo_to_hi(&self) -> bool`[src]

Checks if the value of the field is LOTOHI

`pub fn is_hi_to_lo(&self) -> bool`[src]

Checks if the value of the field is HITOLO

`pub fn is_toggle(&self) -> bool`[src]

Checks if the value of the field is TOGGLE

`impl R<bool, OUTINIT_A>`[src]

`pub fn variant(&self) -> OUTINIT_A`[src]

Get enumerated values variant

`pub fn is_low(&self) -> bool`[src]

Checks if the value of the field is LOW

`pub fn is_high(&self) -> bool`[src]

Checks if the value of the field is HIGH

`impl R<u32, Reg<u32, _CONFIG>>`[src]

`pub fn mode(&self) -> R<u8, MODE_A>`[src]

Bits 0:1 - Mode

`pub fn psel(&self) -> R<u8, u8>`[src]

Bits 8:12 - GPIO number associated with SET[n], CLR[n] and OUT[n] tasks and IN[n] event

`pub fn polarity(&self) -> R<u8, POLARITY_A>`[src]

Bits 16:17 - When In task mode: Operation to be performed on output when OUT[n] task is triggered. When In event mode: Operation on input that shall trigger IN[n] event.

`pub fn outinit(&self) -> R<bool, OUTINIT_A>`[src]

Bit 20 - When in task mode: Initial value of the output when the GPIOTE channel is configured. When in event mode: No effect.

`impl R<u8, PSELP_A>`[src]

`pub fn variant(&self) -> Variant<u8, PSELP_A>`[src]

Get enumerated values variant

`pub fn is_nc(&self) -> bool`[src]

Checks if the value of the field is NC

`pub fn is_analog_input0(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT0

`pub fn is_analog_input1(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT1

`pub fn is_analog_input2(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT2

`pub fn is_analog_input3(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT3

`pub fn is_analog_input4(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT4

`pub fn is_analog_input5(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT5

`pub fn is_analog_input6(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT6

`pub fn is_analog_input7(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT7

`pub fn is_vdd(&self) -> bool`[src]

Checks if the value of the field is VDD

`impl R<u32, Reg<u32, _PSELP>>`[src]

`pub fn pselp(&self) -> R<u8, PSELP_A>`[src]

Bits 0:4 - Analog positive input channel

`impl R<u8, PSELN_A>`[src]

`pub fn variant(&self) -> Variant<u8, PSELN_A>`[src]

Get enumerated values variant

`pub fn is_nc(&self) -> bool`[src]

Checks if the value of the field is NC

`pub fn is_analog_input0(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT0

`pub fn is_analog_input1(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT1

`pub fn is_analog_input2(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT2

`pub fn is_analog_input3(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT3

`pub fn is_analog_input4(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT4

`pub fn is_analog_input5(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT5

`pub fn is_analog_input6(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT6

`pub fn is_analog_input7(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT7

`pub fn is_vdd(&self) -> bool`[src]

Checks if the value of the field is VDD

Checks if the value of the field is GAIN1_4

`pub fn is_gain1_3(&self) -> bool`[src]

Checks if the value of the field is GAIN1_3

`pub fn is_gain1_2(&self) -> bool`[src]

Checks if the value of the field is GAIN1_2

`pub fn is_gain1(&self) -> bool`[src]

Checks if the value of the field is GAIN1

`pub fn is_gain2(&self) -> bool`[src]

Checks if the value of the field is GAIN2

`pub fn is_gain4(&self) -> bool`[src]

Checks if the value of the field is GAIN4

`impl R<bool, REFSEL_A>`[src]

`pub fn variant(&self) -> REFSEL_A`[src]

Get enumerated values variant

`pub fn is_internal(&self) -> bool`[src]

Checks if the value of the field is INTERNAL

`pub fn is_vdd1_4(&self) -> bool`[src]

Checks if the value of the field is VDD1_4

`impl R<u8, TACQ_A>`[src]

`pub fn variant(&self) -> Variant<u8, TACQ_A>`[src]

Get enumerated values variant

`pub fn is_3us(&self) -> bool`[src]

Checks if the value of the field is _3US

`pub fn is_5us(&self) -> bool`[src]

Checks if the value of the field is _5US

`pub fn is_10us(&self) -> bool`[src]

Checks if the value of the field is _10US

`pub fn is_15us(&self) -> bool`[src]

Checks if the value of the field is _15US

`pub fn is_20us(&self) -> bool`[src]

Checks if the value of the field is _20US

`pub fn is_40us(&self) -> bool`[src]

Checks if the value of the field is _40US

`impl R<bool, MODE_A>`[src]

`pub fn variant(&self) -> MODE_A`[src]

Get enumerated values variant

`pub fn is_se(&self) -> bool`[src]

Checks if the value of the field is SE

`pub fn is_diff(&self) -> bool`[src]

Checks if the value of the field is DIFF

`impl R<bool, BURST_A>`[src]

`pub fn variant(&self) -> BURST_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _CONFIG>>`[src]

`pub fn resp(&self) -> R<u8, RESP_A>`[src]

Bits 0:1 - Positive channel resistor control

`pub fn resn(&self) -> R<u8, RESN_A>`[src]

Bits 4:5 - Negative channel resistor control

`pub fn gain(&self) -> R<u8, GAIN_A>`[src]

Bits 8:10 - Gain control

`pub fn refsel(&self) -> R<bool, REFSEL_A>`[src]

Bit 12 - Reference control

`pub fn tacq(&self) -> R<u8, TACQ_A>`[src]

Bits 16:18 - Acquisition time, the time the ADC uses to sample the input voltage

`pub fn mode(&self) -> R<bool, MODE_A>`[src]

Bit 20 - Enable differential mode

`pub fn burst(&self) -> R<bool, BURST_A>`[src]

Bit 24 - Enable burst mode

`impl R<u32, Reg<u32, _LIMIT>>`[src]

`pub fn low(&self) -> R<u16, u16>`[src]

Bits 0:15 - Low level limit

`pub fn high(&self) -> R<u16, u16>`[src]

Bits 16:31 - High level limit

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Data pointer

`impl R<u32, Reg<u32, _MAXCNT>>`[src]

`pub fn maxcnt(&self) -> R<u16, u16>`[src]

Bits 0:14 - Maximum number of buffer words to transfer

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTEN>>`[src]

`pub fn started(&self) -> R<bool, STARTED_A>`[src]

Bit 0 - Enable or disable interrupt for STARTED event

`pub fn end(&self) -> R<bool, END_A>`[src]

Bit 1 - Enable or disable interrupt for END event

`pub fn done(&self) -> R<bool, DONE_A>`[src]

Bit 2 - Enable or disable interrupt for DONE event

`pub fn resultdone(&self) -> R<bool, RESULTDONE_A>`[src]

Bit 3 - Enable or disable interrupt for RESULTDONE event

`pub fn calibratedone(&self) -> R<bool, CALIBRATEDONE_A>`[src]

Bit 4 - Enable or disable interrupt for CALIBRATEDONE event

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 5 - Enable or disable interrupt for STOPPED event

`pub fn ch0limith(&self) -> R<bool, CH0LIMITH_A>`[src]

Bit 6 - Enable or disable interrupt for CH[0].LIMITH event

`pub fn ch0limitl(&self) -> R<bool, CH0LIMITL_A>`[src]

Bit 7 - Enable or disable interrupt for CH[0].LIMITL event

`pub fn ch1limith(&self) -> R<bool, CH1LIMITH_A>`[src]

Bit 8 - Enable or disable interrupt for CH[1].LIMITH event

`pub fn ch1limitl(&self) -> R<bool, CH1LIMITL_A>`[src]

Bit 9 - Enable or disable interrupt for CH[1].LIMITL event

`pub fn ch2limith(&self) -> R<bool, CH2LIMITH_A>`[src]

Bit 10 - Enable or disable interrupt for CH[2].LIMITH event

`pub fn ch2limitl(&self) -> R<bool, CH2LIMITL_A>`[src]

Bit 11 - Enable or disable interrupt for CH[2].LIMITL event

`pub fn ch3limith(&self) -> R<bool, CH3LIMITH_A>`[src]

Bit 12 - Enable or disable interrupt for CH[3].LIMITH event

`pub fn ch3limitl(&self) -> R<bool, CH3LIMITL_A>`[src]

Bit 13 - Enable or disable interrupt for CH[3].LIMITL event

`pub fn ch4limith(&self) -> R<bool, CH4LIMITH_A>`[src]

Bit 14 - Enable or disable interrupt for CH[4].LIMITH event

`pub fn ch4limitl(&self) -> R<bool, CH4LIMITL_A>`[src]

Bit 15 - Enable or disable interrupt for CH[4].LIMITL event

`pub fn ch5limith(&self) -> R<bool, CH5LIMITH_A>`[src]

Bit 16 - Enable or disable interrupt for CH[5].LIMITH event

`pub fn ch5limitl(&self) -> R<bool, CH5LIMITL_A>`[src]

Bit 17 - Enable or disable interrupt for CH[5].LIMITL event

`pub fn ch6limith(&self) -> R<bool, CH6LIMITH_A>`[src]

Bit 18 - Enable or disable interrupt for CH[6].LIMITH event

`pub fn ch6limitl(&self) -> R<bool, CH6LIMITL_A>`[src]

Bit 19 - Enable or disable interrupt for CH[6].LIMITL event

`pub fn ch7limith(&self) -> R<bool, CH7LIMITH_A>`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn started(&self) -> R<bool, STARTED_A>`[src]

Bit 0 - Write '1' to Enable interrupt for STARTED event

`pub fn end(&self) -> R<bool, END_A>`[src]

Bit 1 - Write '1' to Enable interrupt for END event

`pub fn done(&self) -> R<bool, DONE_A>`[src]

Bit 2 - Write '1' to Enable interrupt for DONE event

`pub fn resultdone(&self) -> R<bool, RESULTDONE_A>`[src]

Bit 3 - Write '1' to Enable interrupt for RESULTDONE event

`pub fn calibratedone(&self) -> R<bool, CALIBRATEDONE_A>`[src]

Bit 4 - Write '1' to Enable interrupt for CALIBRATEDONE event

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 5 - Write '1' to Enable interrupt for STOPPED event

`pub fn ch0limith(&self) -> R<bool, CH0LIMITH_A>`[src]

Bit 6 - Write '1' to Enable interrupt for CH[0].LIMITH event

`pub fn ch0limitl(&self) -> R<bool, CH0LIMITL_A>`[src]

Bit 7 - Write '1' to Enable interrupt for CH[0].LIMITL event

`pub fn ch1limith(&self) -> R<bool, CH1LIMITH_A>`[src]

Bit 8 - Write '1' to Enable interrupt for CH[1].LIMITH event

`pub fn ch1limitl(&self) -> R<bool, CH1LIMITL_A>`[src]

Bit 9 - Write '1' to Enable interrupt for CH[1].LIMITL event

`pub fn ch2limith(&self) -> R<bool, CH2LIMITH_A>`[src]

Bit 10 - Write '1' to Enable interrupt for CH[2].LIMITH event

`pub fn ch2limitl(&self) -> R<bool, CH2LIMITL_A>`[src]

Bit 11 - Write '1' to Enable interrupt for CH[2].LIMITL event

`pub fn ch3limith(&self) -> R<bool, CH3LIMITH_A>`[src]

Bit 12 - Write '1' to Enable interrupt for CH[3].LIMITH event

`pub fn ch3limitl(&self) -> R<bool, CH3LIMITL_A>`[src]

Bit 13 - Write '1' to Enable interrupt for CH[3].LIMITL event

`pub fn ch4limith(&self) -> R<bool, CH4LIMITH_A>`[src]

Bit 14 - Write '1' to Enable interrupt for CH[4].LIMITH event

`pub fn ch4limitl(&self) -> R<bool, CH4LIMITL_A>`[src]

Bit 15 - Write '1' to Enable interrupt for CH[4].LIMITL event

`pub fn ch5limith(&self) -> R<bool, CH5LIMITH_A>`[src]

Bit 16 - Write '1' to Enable interrupt for CH[5].LIMITH event

`pub fn ch5limitl(&self) -> R<bool, CH5LIMITL_A>`[src]

Bit 17 - Write '1' to Enable interrupt for CH[5].LIMITL event

`pub fn ch6limith(&self) -> R<bool, CH6LIMITH_A>`[src]

Bit 18 - Write '1' to Enable interrupt for CH[6].LIMITH event

`pub fn ch6limitl(&self) -> R<bool, CH6LIMITL_A>`[src]

Bit 19 - Write '1' to Enable interrupt for CH[6].LIMITL event

`pub fn ch7limith(&self) -> R<bool, CH7LIMITH_A>`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn started(&self) -> R<bool, STARTED_A>`[src]

Bit 0 - Write '1' to Disable interrupt for STARTED event

`pub fn end(&self) -> R<bool, END_A>`[src]

Bit 1 - Write '1' to Disable interrupt for END event

`pub fn done(&self) -> R<bool, DONE_A>`[src]

Bit 2 - Write '1' to Disable interrupt for DONE event

`pub fn resultdone(&self) -> R<bool, RESULTDONE_A>`[src]

Bit 3 - Write '1' to Disable interrupt for RESULTDONE event

`pub fn calibratedone(&self) -> R<bool, CALIBRATEDONE_A>`[src]

Bit 4 - Write '1' to Disable interrupt for CALIBRATEDONE event

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 5 - Write '1' to Disable interrupt for STOPPED event

`pub fn ch0limith(&self) -> R<bool, CH0LIMITH_A>`[src]

Bit 6 - Write '1' to Disable interrupt for CH[0].LIMITH event

`pub fn ch0limitl(&self) -> R<bool, CH0LIMITL_A>`[src]

Bit 7 - Write '1' to Disable interrupt for CH[0].LIMITL event

`pub fn ch1limith(&self) -> R<bool, CH1LIMITH_A>`[src]

Bit 8 - Write '1' to Disable interrupt for CH[1].LIMITH event

`pub fn ch1limitl(&self) -> R<bool, CH1LIMITL_A>`[src]

Bit 9 - Write '1' to Disable interrupt for CH[1].LIMITL event

`pub fn ch2limith(&self) -> R<bool, CH2LIMITH_A>`[src]

Bit 10 - Write '1' to Disable interrupt for CH[2].LIMITH event

`pub fn ch2limitl(&self) -> R<bool, CH2LIMITL_A>`[src]

Bit 11 - Write '1' to Disable interrupt for CH[2].LIMITL event

`pub fn ch3limith(&self) -> R<bool, CH3LIMITH_A>`[src]

Bit 12 - Write '1' to Disable interrupt for CH[3].LIMITH event

`pub fn ch3limitl(&self) -> R<bool, CH3LIMITL_A>`[src]

Bit 13 - Write '1' to Disable interrupt for CH[3].LIMITL event

`pub fn ch4limith(&self) -> R<bool, CH4LIMITH_A>`[src]

Bit 14 - Write '1' to Disable interrupt for CH[4].LIMITH event

`pub fn ch4limitl(&self) -> R<bool, CH4LIMITL_A>`[src]

Bit 15 - Write '1' to Disable interrupt for CH[4].LIMITL event

`pub fn ch5limith(&self) -> R<bool, CH5LIMITH_A>`[src]

Bit 16 - Write '1' to Disable interrupt for CH[5].LIMITH event

`pub fn ch5limitl(&self) -> R<bool, CH5LIMITL_A>`[src]

Bit 17 - Write '1' to Disable interrupt for CH[5].LIMITL event

`pub fn ch6limith(&self) -> R<bool, CH6LIMITH_A>`[src]

Bit 18 - Write '1' to Disable interrupt for CH[6].LIMITH event

`pub fn ch6limitl(&self) -> R<bool, CH6LIMITL_A>`[src]

Bit 19 - Write '1' to Disable interrupt for CH[6].LIMITL event

`pub fn ch7limith(&self) -> R<bool, CH7LIMITH_A>`[src]

`pub fn is_12bit(&self) -> bool`[src]

Checks if the value of the field is _12BIT

`pub fn is_14bit(&self) -> bool`[src]

Checks if the value of the field is _14BIT

`impl R<u32, Reg<u32, _RESOLUTION>>`[src]

`pub fn val(&self) -> R<u8, VAL_A>`[src]

Bits 0:2 - Set the resolution

`impl R<u8, OVERSAMPLE_A>`[src]

`pub fn variant(&self) -> Variant<u8, OVERSAMPLE_A>`[src]

Get enumerated values variant

`pub fn is_bypass(&self) -> bool`[src]

Checks if the value of the field is BYPASS

`pub fn is_over2x(&self) -> bool`[src]

Checks if the value of the field is OVER2X

`pub fn is_over4x(&self) -> bool`[src]

Checks if the value of the field is OVER4X

`pub fn is_over8x(&self) -> bool`[src]

Checks if the value of the field is OVER8X

`pub fn is_over16x(&self) -> bool`[src]

Checks if the value of the field is OVER16X

`pub fn is_over32x(&self) -> bool`[src]

Checks if the value of the field is OVER32X

`pub fn is_over64x(&self) -> bool`[src]

Checks if the value of the field is OVER64X

`pub fn is_over128x(&self) -> bool`[src]

Checks if the value of the field is OVER128X

`pub fn is_over256x(&self) -> bool`[src]

Checks if the value of the field is OVER256X

`impl R<u32, Reg<u32, _OVERSAMPLE>>`[src]

`pub fn oversample(&self) -> R<u8, OVERSAMPLE_A>`[src]

Bits 0:3 - Oversample control

`impl R<bool, MODE_A>`[src]

`pub fn variant(&self) -> MODE_A`[src]

Get enumerated values variant

`pub fn is_task(&self) -> bool`[src]

Checks if the value of the field is TASK

`pub fn is_timers(&self) -> bool`[src]

Checks if the value of the field is TIMERS

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _SHORTS>>`[src]

`pub fn compare0_clear(&self) -> R<bool, COMPARE0_CLEAR_A>`[src]

Bit 0 - Shortcut between COMPARE[0] event and CLEAR task

`pub fn compare1_clear(&self) -> R<bool, COMPARE1_CLEAR_A>`[src]

Bit 1 - Shortcut between COMPARE[1] event and CLEAR task

`pub fn compare2_clear(&self) -> R<bool, COMPARE2_CLEAR_A>`[src]

Bit 2 - Shortcut between COMPARE[2] event and CLEAR task

`pub fn compare3_clear(&self) -> R<bool, COMPARE3_CLEAR_A>`[src]

Bit 3 - Shortcut between COMPARE[3] event and CLEAR task

`pub fn compare0_stop(&self) -> R<bool, COMPARE0_STOP_A>`[src]

`pub fn compare3(&self) -> R<bool, COMPARE3_A>`[src]

Bit 19 - Write '1' to Enable interrupt for COMPARE[3] event

`impl R<bool, COMPARE0_A>`[src]

`pub fn variant(&self) -> COMPARE0_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, COMPARE1_A>`[src]

`pub fn variant(&self) -> COMPARE1_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, COMPARE2_A>`[src]

`pub fn variant(&self) -> COMPARE2_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, COMPARE3_A>`[src]

`pub fn variant(&self) -> COMPARE3_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn compare0(&self) -> R<bool, COMPARE0_A>`[src]

Bit 16 - Write '1' to Disable interrupt for COMPARE[0] event

`pub fn compare1(&self) -> R<bool, COMPARE1_A>`[src]

Bit 17 - Write '1' to Disable interrupt for COMPARE[1] event

`pub fn compare2(&self) -> R<bool, COMPARE2_A>`[src]

Bit 18 - Write '1' to Disable interrupt for COMPARE[2] event

`pub fn compare3(&self) -> R<bool, COMPARE3_A>`[src]

Bit 19 - Write '1' to Disable interrupt for COMPARE[3] event

`impl R<u8, MODE_A>`[src]

`pub fn variant(&self) -> Variant<u8, MODE_A>`[src]

Get enumerated values variant

`pub fn is_timer(&self) -> bool`[src]

Checks if the value of the field is TIMER

`pub fn is_counter(&self) -> bool`[src]

Checks if the value of the field is COUNTER

`pub fn is_low_power_counter(&self) -> bool`[src]

Checks if the value of the field is LOWPOWERCOUNTER

`impl R<u32, Reg<u32, _MODE>>`[src]

`pub fn mode(&self) -> R<u8, MODE_A>`[src]

Bits 0:1 - Timer mode

`impl R<u8, BITMODE_A>`[src]

`pub fn variant(&self) -> BITMODE_A`[src]

Get enumerated values variant

`pub fn is_16bit(&self) -> bool`[src]

Checks if the value of the field is _16BIT

`pub fn is_08bit(&self) -> bool`[src]

Checks if the value of the field is _08BIT

`pub fn is_24bit(&self) -> bool`[src]

Checks if the value of the field is _24BIT

`pub fn is_32bit(&self) -> bool`[src]

Checks if the value of the field is _32BIT

`impl R<u32, Reg<u32, _BITMODE>>`[src]

`pub fn bitmode(&self) -> R<u8, BITMODE_A>`[src]

Bits 0:1 - Timer bit width

`impl R<u32, Reg<u32, _PRESCALER>>`[src]

`pub fn prescaler(&self) -> R<u8, u8>`[src]

Bits 0:3 - Prescaler value

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn tick(&self) -> R<bool, TICK_A>`[src]

Bit 0 - Write '1' to Enable interrupt for TICK event

`pub fn ovrflw(&self) -> R<bool, OVRFLW_A>`[src]

Bit 1 - Write '1' to Enable interrupt for OVRFLW event

`pub fn compare0(&self) -> R<bool, COMPARE0_A>`[src]

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _EVTENCLR>>`[src]

`pub fn tick(&self) -> R<bool, TICK_A>`[src]

Bit 0 - Write '1' to Disable event routing for TICK event

`pub fn ovrflw(&self) -> R<bool, OVRFLW_A>`[src]

Bit 1 - Write '1' to Disable event routing for OVRFLW event

`pub fn compare0(&self) -> R<bool, COMPARE0_A>`[src]

Bit 16 - Write '1' to Disable event routing for COMPARE[0] event

`pub fn compare1(&self) -> R<bool, COMPARE1_A>`[src]

Bit 17 - Write '1' to Disable event routing for COMPARE[1] event

`pub fn compare2(&self) -> R<bool, COMPARE2_A>`[src]

Bit 18 - Write '1' to Disable event routing for COMPARE[2] event

`pub fn compare3(&self) -> R<bool, COMPARE3_A>`[src]

Bit 19 - Write '1' to Disable event routing for COMPARE[3] event

`impl R<u32, Reg<u32, _COUNTER>>`[src]

`pub fn counter(&self) -> R<u32, u32>`[src]

Bits 0:23 - Counter value

`impl R<u32, Reg<u32, _PRESCALER>>`[src]

`pub fn prescaler(&self) -> R<u16, u16>`[src]

Bits 0:11 - Prescaler value

`impl R<u32, Reg<u32, _CC>>`[src]

`pub fn compare(&self) -> R<u32, u32>`[src]

Bits 0:23 - Compare value

`impl R<bool, DATARDY_A>`[src]

`pub fn variant(&self) -> DATARDY_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn datardy(&self) -> R<bool, DATARDY_A>`[src]

Bit 0 - Write '1' to Enable interrupt for DATARDY event

`impl R<bool, DATARDY_A>`[src]

`pub fn variant(&self) -> DATARDY_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn datardy(&self) -> R<bool, DATARDY_A>`[src]

Bit 0 - Write '1' to Disable interrupt for DATARDY event

`impl R<u32, Reg<u32, _TEMP>>`[src]

`pub fn temp(&self) -> R<u32, u32>`[src]

Bits 0:31 - Temperature in degC (0.25deg steps)

`impl R<u32, Reg<u32, _A0>>`[src]

`pub fn a0(&self) -> R<u16, u16>`[src]

Bits 0:11 - Slope of 1st piece wise linear function

`impl R<u32, Reg<u32, _A1>>`[src]

`pub fn a1(&self) -> R<u16, u16>`[src]

Bits 0:11 - Slope of 2nd piece wise linear function

`impl R<u32, Reg<u32, _A2>>`[src]

`pub fn a2(&self) -> R<u16, u16>`[src]

Bits 0:11 - Slope of 3rd piece wise linear function

`impl R<u32, Reg<u32, _A3>>`[src]

`pub fn a3(&self) -> R<u16, u16>`[src]

Bits 0:11 - Slope of 4th piece wise linear function

`impl R<u32, Reg<u32, _A4>>`[src]

`pub fn a4(&self) -> R<u16, u16>`[src]

Bits 0:11 - Slope of 5th piece wise linear function

`impl R<u32, Reg<u32, _A5>>`[src]

`pub fn a5(&self) -> R<u16, u16>`[src]

Bits 0:11 - Slope of 6th piece wise linear function

`impl R<u32, Reg<u32, _B0>>`[src]

`pub fn b0(&self) -> R<u16, u16>`[src]

Bits 0:13 - y-intercept of 1st piece wise linear function

`impl R<u32, Reg<u32, _B1>>`[src]

`pub fn b1(&self) -> R<u16, u16>`[src]

Bits 0:13 - y-intercept of 2nd piece wise linear function

`impl R<u32, Reg<u32, _B2>>`[src]

`pub fn b2(&self) -> R<u16, u16>`[src]

Bits 0:13 - y-intercept of 3rd piece wise linear function

`impl R<u32, Reg<u32, _B3>>`[src]

`pub fn b3(&self) -> R<u16, u16>`[src]

Bits 0:13 - y-intercept of 4th piece wise linear function

`impl R<u32, Reg<u32, _B4>>`[src]

`pub fn b4(&self) -> R<u16, u16>`[src]

Bits 0:13 - y-intercept of 5th piece wise linear function

`impl R<u32, Reg<u32, _B5>>`[src]

`pub fn b5(&self) -> R<u16, u16>`[src]

Bits 0:13 - y-intercept of 6th piece wise linear function

`impl R<u32, Reg<u32, _T0>>`[src]

`pub fn t0(&self) -> R<u8, u8>`[src]

Bits 0:7 - End point of 1st piece wise linear function

`impl R<u32, Reg<u32, _T1>>`[src]

`pub fn t1(&self) -> R<u8, u8>`[src]

Bits 0:7 - End point of 2nd piece wise linear function

`impl R<u32, Reg<u32, _T2>>`[src]

`pub fn t2(&self) -> R<u8, u8>`[src]

Bits 0:7 - End point of 3rd piece wise linear function

`impl R<u32, Reg<u32, _T3>>`[src]

`pub fn t3(&self) -> R<u8, u8>`[src]

Bits 0:7 - End point of 4th piece wise linear function

`impl R<u32, Reg<u32, _T4>>`[src]

`pub fn t4(&self) -> R<u8, u8>`[src]

Bits 0:7 - End point of 5th piece wise linear function

`impl R<bool, VALRDY_STOP_A>`[src]

`pub fn variant(&self) -> VALRDY_STOP_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _SHORTS>>`[src]

`pub fn valrdy_stop(&self) -> R<bool, VALRDY_STOP_A>`[src]

Bit 0 - Shortcut between VALRDY event and STOP task

`impl R<bool, VALRDY_A>`[src]

`pub fn variant(&self) -> VALRDY_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn valrdy(&self) -> R<bool, VALRDY_A>`[src]

Bit 0 - Write '1' to Enable interrupt for VALRDY event

`impl R<bool, VALRDY_A>`[src]

`pub fn variant(&self) -> VALRDY_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn valrdy(&self) -> R<bool, VALRDY_A>`[src]

Bit 0 - Write '1' to Disable interrupt for VALRDY event

`impl R<bool, DERCEN_A>`[src]

`pub fn variant(&self) -> DERCEN_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _CONFIG>>`[src]

`pub fn dercen(&self) -> R<bool, DERCEN_A>`[src]

Bit 0 - Bias correction

`impl R<u32, Reg<u32, _VALUE>>`[src]

`pub fn value(&self) -> R<u8, u8>`[src]

Bits 0:7 - Generated random number

`impl R<bool, ENDECB_A>`[src]

`pub fn variant(&self) -> ENDECB_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, ERRORECB_A>`[src]

`pub fn variant(&self) -> ERRORECB_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn endecb(&self) -> R<bool, ENDECB_A>`[src]

Bit 0 - Write '1' to Enable interrupt for ENDECB event

`pub fn errorecb(&self) -> R<bool, ERRORECB_A>`[src]

Bit 1 - Write '1' to Enable interrupt for ERRORECB event

`impl R<bool, ENDECB_A>`[src]

`pub fn variant(&self) -> ENDECB_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, ERRORECB_A>`[src]

`pub fn variant(&self) -> ERRORECB_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn endecb(&self) -> R<bool, ENDECB_A>`[src]

Bit 0 - Write '1' to Disable interrupt for ENDECB event

`pub fn errorecb(&self) -> R<bool, ERRORECB_A>`[src]

Bit 1 - Write '1' to Disable interrupt for ERRORECB event

`impl R<u32, Reg<u32, _ECBDATAPTR>>`[src]

`pub fn ecbdataptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Pointer to the ECB data structure (see Table 1 ECB data structure overview)

`impl R<bool, ENDKSGEN_CRYPT_A>`[src]

`pub fn variant(&self) -> ENDKSGEN_CRYPT_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, DATARATE_A>`[src]

`pub fn variant(&self) -> DATARATE_A`[src]

Get enumerated values variant

`pub fn is_1mbit(&self) -> bool`[src]

Checks if the value of the field is _1MBIT

`pub fn is_2mbit(&self) -> bool`[src]

Checks if the value of the field is _2MBIT

`impl R<bool, LENGTH_A>`[src]

`pub fn variant(&self) -> LENGTH_A`[src]

Get enumerated values variant

`pub fn is_default(&self) -> bool`[src]

Checks if the value of the field is DEFAULT

`pub fn is_extended(&self) -> bool`[src]

Checks if the value of the field is EXTENDED

`impl R<u32, Reg<u32, _MODE>>`[src]

`pub fn mode(&self) -> R<bool, MODE_A>`[src]

Bit 0 - The mode of operation to be used

`pub fn datarate(&self) -> R<bool, DATARATE_A>`[src]

Bit 16 - Data rate that the CCM shall run in synch with

`pub fn length(&self) -> R<bool, LENGTH_A>`[src]

Bit 24 - Packet length configuration

`impl R<u32, Reg<u32, _CNFPTR>>`[src]

`pub fn cnfptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview)

`impl R<u32, Reg<u32, _INPTR>>`[src]

`pub fn inptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Input pointer

`impl R<u32, Reg<u32, _OUTPTR>>`[src]

`pub fn outptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Output pointer

Bit 1 - Write '1' to Disable interrupt for RESOLVED event

`pub fn notresolved(&self) -> R<bool, NOTRESOLVED_A>`[src]

Bit 2 - Write '1' to Disable interrupt for NOTRESOLVED event

`impl R<u32, Reg<u32, _STATUS>>`[src]

`pub fn status(&self) -> R<u8, u8>`[src]

Bits 0:3 - The IRK that was used last time an address was resolved

`impl R<u8, ENABLE_A>`[src]

`pub fn variant(&self) -> Variant<u8, ENABLE_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _ENABLE>>`[src]

`pub fn enable(&self) -> R<u8, ENABLE_A>`[src]

Bits 0:1 - Enable or disable AAR

`impl R<u32, Reg<u32, _NIRK>>`[src]

`pub fn nirk(&self) -> R<u8, u8>`[src]

Bits 0:4 - Number of Identity root keys available in the IRK data structure

`impl R<u32, Reg<u32, _IRKPTR>>`[src]

`pub fn irkptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Pointer to the IRK data structure

Bit 1 - Request status for RR[1] register

`pub fn rr2(&self) -> R<bool, RR2_A>`[src]

Bit 2 - Request status for RR[2] register

`pub fn rr3(&self) -> R<bool, RR3_A>`[src]

Bit 3 - Request status for RR[3] register

`pub fn rr4(&self) -> R<bool, RR4_A>`[src]

Bit 4 - Request status for RR[4] register

`pub fn rr5(&self) -> R<bool, RR5_A>`[src]

Bit 5 - Request status for RR[5] register

`pub fn rr6(&self) -> R<bool, RR6_A>`[src]

Bit 6 - Request status for RR[6] register

`pub fn rr7(&self) -> R<bool, RR7_A>`[src]

Bit 7 - Request status for RR[7] register

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _RREN>>`[src]

`pub fn rr0(&self) -> R<bool, RR0_A>`[src]

Bit 0 - Enable or disable RR[0] register

`pub fn rr1(&self) -> R<bool, RR1_A>`[src]

Bit 1 - Enable or disable RR[1] register

`pub fn rr2(&self) -> R<bool, RR2_A>`[src]

Bit 2 - Enable or disable RR[2] register

`pub fn rr3(&self) -> R<bool, RR3_A>`[src]

Bit 3 - Enable or disable RR[3] register

`pub fn rr4(&self) -> R<bool, RR4_A>`[src]

Bit 4 - Enable or disable RR[4] register

`pub fn rr5(&self) -> R<bool, RR5_A>`[src]

Bit 5 - Enable or disable RR[5] register

`pub fn rr6(&self) -> R<bool, RR6_A>`[src]

Bit 6 - Enable or disable RR[6] register

`pub fn rr7(&self) -> R<bool, RR7_A>`[src]

Bit 7 - Enable or disable RR[7] register

`impl R<bool, SLEEP_A>`[src]

`pub fn variant(&self) -> SLEEP_A`[src]

`impl R<u32, Reg<u32, _SHORTS>>`[src]

`pub fn reportrdy_readclracc(&self) -> R<bool, REPORTRDY_READCLRACC_A>`[src]

Bit 0 - Shortcut between REPORTRDY event and READCLRACC task

`pub fn samplerdy_stop(&self) -> R<bool, SAMPLERDY_STOP_A>`[src]

Bit 1 - Shortcut between SAMPLERDY event and STOP task

`pub fn reportrdy_rdclracc(&self) -> R<bool, REPORTRDY_RDCLRACC_A>`[src]

Bit 2 - Shortcut between REPORTRDY event and RDCLRACC task

`pub fn reportrdy_stop(&self) -> R<bool, REPORTRDY_STOP_A>`[src]

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn samplerdy(&self) -> R<bool, SAMPLERDY_A>`[src]

Bit 0 - Write '1' to Enable interrupt for SAMPLERDY event

`pub fn reportrdy(&self) -> R<bool, REPORTRDY_A>`[src]

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn samplerdy(&self) -> R<bool, SAMPLERDY_A>`[src]

Bit 0 - Write '1' to Disable interrupt for SAMPLERDY event

`pub fn reportrdy(&self) -> R<bool, REPORTRDY_A>`[src]

Bit 1 - Write '1' to Disable interrupt for REPORTRDY event

`pub fn accof(&self) -> R<bool, ACCOF_A>`[src]

Bit 2 - Write '1' to Disable interrupt for ACCOF event

`pub fn dblrdy(&self) -> R<bool, DBLRDY_A>`[src]

`pub fn is_512us(&self) -> bool`[src]

Checks if the value of the field is _512US

`pub fn is_1024us(&self) -> bool`[src]

Checks if the value of the field is _1024US

`pub fn is_2048us(&self) -> bool`[src]

Checks if the value of the field is _2048US

`pub fn is_4096us(&self) -> bool`[src]

Checks if the value of the field is _4096US

`pub fn is_8192us(&self) -> bool`[src]

Checks if the value of the field is _8192US

`pub fn is_16384us(&self) -> bool`[src]

Checks if the value of the field is _16384US

`pub fn is_32ms(&self) -> bool`[src]

Checks if the value of the field is _32MS

`pub fn is_65ms(&self) -> bool`[src]

Checks if the value of the field is _65MS

`pub fn is_131ms(&self) -> bool`[src]

Checks if the value of the field is _131MS

`impl R<u32, Reg<u32, _SAMPLEPER>>`[src]

`pub fn sampleper(&self) -> R<u8, SAMPLEPER_A>`[src]

Bits 0:3 - Sample period. The SAMPLE register will be updated for every new sample

`impl R<u32, Reg<u32, _SAMPLE>>`[src]

`pub fn sample(&self) -> R<u32, u32>`[src]

Bits 0:31 - Last motion sample

`impl R<u8, REPORTPER_A>`[src]

`pub fn variant(&self) -> Variant<u8, REPORTPER_A>`[src]

Get enumerated values variant

`pub fn is_10smpl(&self) -> bool`[src]

Checks if the value of the field is _10SMPL

`pub fn is_40smpl(&self) -> bool`[src]

Checks if the value of the field is _40SMPL

`pub fn is_80smpl(&self) -> bool`[src]

Checks if the value of the field is _80SMPL

`pub fn is_120smpl(&self) -> bool`[src]

Checks if the value of the field is _120SMPL

`pub fn is_160smpl(&self) -> bool`[src]

Checks if the value of the field is _160SMPL

`pub fn is_200smpl(&self) -> bool`[src]

Checks if the value of the field is _200SMPL

`pub fn is_240smpl(&self) -> bool`[src]

Checks if the value of the field is _240SMPL

`pub fn is_280smpl(&self) -> bool`[src]

Checks if the value of the field is _280SMPL

`pub fn is_1smpl(&self) -> bool`[src]

Checks if the value of the field is _1SMPL

`impl R<u32, Reg<u32, _REPORTPER>>`[src]

`pub fn reportper(&self) -> R<u8, REPORTPER_A>`[src]

Bits 0:3 - Specifies the number of samples to be accumulated in the ACC register before the REPORTRDY and DBLRDY events can be generated

`impl R<u32, Reg<u32, _ACC>>`[src]

`pub fn acc(&self) -> R<u32, u32>`[src]

Bits 0:31 - Register accumulating all valid samples (not double transition) read from the SAMPLE register

`impl R<u32, Reg<u32, _ACCREAD>>`[src]

`pub fn accread(&self) -> R<u32, u32>`[src]

Bits 0:31 - Snapshot of the ACC register.

`impl R<bool, DBFEN_A>`[src]

`pub fn variant(&self) -> DBFEN_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _DBFEN>>`[src]

`pub fn dbfen(&self) -> R<bool, DBFEN_A>`[src]

Bit 0 - Enable input debounce filters

`impl R<u32, Reg<u32, _LEDPRE>>`[src]

`pub fn ledpre(&self) -> R<u16, u16>`[src]

Bits 0:8 - Period in us the LED is switched on prior to sampling

`impl R<u32, Reg<u32, _ACCDBL>>`[src]

`pub fn accdbl(&self) -> R<u8, u8>`[src]

Bits 0:3 - Register accumulating the number of detected double or illegal transitions. ( SAMPLE = 2 ).

`pub fn cross(&self) -> R<bool, CROSS_A>`[src]

Bit 3 - Enable or disable interrupt for CROSS event

`impl R<bool, READY_A>`[src]

`pub fn variant(&self) -> READY_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, DOWN_A>`[src]

`pub fn variant(&self) -> DOWN_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, UP_A>`[src]

`pub fn variant(&self) -> UP_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, CROSS_A>`[src]

`pub fn variant(&self) -> CROSS_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn ready(&self) -> R<bool, READY_A>`[src]

`pub fn is_analog_input2(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT2

`pub fn is_analog_input3(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT3

`pub fn is_analog_input4(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT4

`pub fn is_analog_input5(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT5

`pub fn is_analog_input6(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT6

`pub fn is_analog_input7(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT7

`impl R<u32, Reg<u32, _PSEL>>`[src]

`pub fn psel(&self) -> R<u8, PSEL_A>`[src]

Bits 0:2 - Analog pin select

`impl R<u8, REFSEL_A>`[src]

`pub fn variant(&self) -> Variant<u8, REFSEL_A>`[src]

Get enumerated values variant

`pub fn is_int1v2(&self) -> bool`[src]

Checks if the value of the field is INT1V2

`pub fn is_int1v8(&self) -> bool`[src]

Checks if the value of the field is INT1V8

`pub fn is_int2v4(&self) -> bool`[src]

Checks if the value of the field is INT2V4

`pub fn is_vdd(&self) -> bool`[src]

Checks if the value of the field is VDD

`pub fn is_aref(&self) -> bool`[src]

Checks if the value of the field is AREF

`impl R<u32, Reg<u32, _REFSEL>>`[src]

`pub fn refsel(&self) -> R<u8, REFSEL_A>`[src]

Bits 0:2 - Reference select

`impl R<u8, EXTREFSEL_A>`[src]

`pub fn variant(&self) -> EXTREFSEL_A`[src]

Get enumerated values variant

`pub fn is_analog_reference0(&self) -> bool`[src]

Checks if the value of the field is ANALOGREFERENCE0

`pub fn is_analog_reference1(&self) -> bool`[src]

Checks if the value of the field is ANALOGREFERENCE1

`pub fn is_analog_reference2(&self) -> bool`[src]

Checks if the value of the field is ANALOGREFERENCE2

`pub fn is_analog_reference3(&self) -> bool`[src]

Checks if the value of the field is ANALOGREFERENCE3

`pub fn is_analog_reference4(&self) -> bool`[src]

Checks if the value of the field is ANALOGREFERENCE4

`pub fn is_analog_reference5(&self) -> bool`[src]

Checks if the value of the field is ANALOGREFERENCE5

`pub fn is_analog_reference6(&self) -> bool`[src]

Checks if the value of the field is ANALOGREFERENCE6

`pub fn is_analog_reference7(&self) -> bool`[src]

Checks if the value of the field is ANALOGREFERENCE7

`impl R<u32, Reg<u32, _EXTREFSEL>>`[src]

`pub fn extrefsel(&self) -> R<u8, EXTREFSEL_A>`[src]

Bits 0:2 - External analog reference select

`impl R<u32, Reg<u32, _TH>>`[src]

`pub fn thdown(&self) -> R<u8, u8>`[src]

Bits 0:5 - VDOWN = (THDOWN+1)/64*VREF

`pub fn thup(&self) -> R<u8, u8>`[src]

Bits 8:13 - VUP = (THUP+1)/64*VREF

`impl R<u8, SP_A>`[src]

`pub fn variant(&self) -> Variant<u8, SP_A>`[src]

Get enumerated values variant

`pub fn is_low(&self) -> bool`[src]

Checks if the value of the field is LOW

`pub fn is_normal(&self) -> bool`[src]

Checks if the value of the field is NORMAL

`pub fn is_high(&self) -> bool`[src]

Checks if the value of the field is HIGH

`impl R<bool, MAIN_A>`[src]

`pub fn variant(&self) -> MAIN_A`[src]

Get enumerated values variant

`pub fn is_se(&self) -> bool`[src]

Checks if the value of the field is SE

`pub fn is_diff(&self) -> bool`[src]

Checks if the value of the field is DIFF

`impl R<u32, Reg<u32, _MODE>>`[src]

`pub fn sp(&self) -> R<u8, SP_A>`[src]

Bits 0:1 - Speed and power modes

`pub fn main(&self) -> R<bool, MAIN_A>`[src]

Bit 8 - Main operation modes

`impl R<bool, HYST_A>`[src]

`pub fn variant(&self) -> HYST_A`[src]

Get enumerated values variant

`pub fn is_no_hyst(&self) -> bool`[src]

Checks if the value of the field is NOHYST

`pub fn is_hyst50m_v(&self) -> bool`[src]

Checks if the value of the field is HYST50MV

`impl R<u32, Reg<u32, _HYST>>`[src]

`pub fn hyst(&self) -> R<bool, HYST_A>`[src]

Bit 0 - Comparator hysteresis

`impl R<u8, ISOURCE_A>`[src]

`pub fn variant(&self) -> ISOURCE_A`[src]

Get enumerated values variant

`pub fn is_off(&self) -> bool`[src]

Checks if the value of the field is OFF

`pub fn is_ien2m_a5(&self) -> bool`[src]

Checks if the value of the field is IEN2MA5

`pub fn is_ien5m_a(&self) -> bool`[src]

Checks if the value of the field is IEN5MA

`pub fn is_ien10m_a(&self) -> bool`[src]

Checks if the value of the field is IEN10MA

`pub fn cross(&self) -> R<bool, CROSS_A>`[src]

Bit 3 - Write '1' to Enable interrupt for CROSS event

`impl R<bool, READY_A>`[src]

`pub fn variant(&self) -> READY_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, DOWN_A>`[src]

`pub fn variant(&self) -> DOWN_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, UP_A>`[src]

`pub fn variant(&self) -> UP_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, CROSS_A>`[src]

`pub fn variant(&self) -> CROSS_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn ready(&self) -> R<bool, READY_A>`[src]

Bit 0 - Write '1' to Disable interrupt for READY event

`pub fn down(&self) -> R<bool, DOWN_A>`[src]

Bit 1 - Write '1' to Disable interrupt for DOWN event

`pub fn up(&self) -> R<bool, UP_A>`[src]

`pub fn is_analog_input2(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT2

`pub fn is_analog_input3(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT3

`pub fn is_analog_input4(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT4

`pub fn is_analog_input5(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT5

`pub fn is_analog_input6(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT6

`pub fn is_analog_input7(&self) -> bool`[src]

Checks if the value of the field is ANALOGINPUT7

`impl R<u32, Reg<u32, _PSEL>>`[src]

`pub fn psel(&self) -> R<u8, PSEL_A>`[src]

Bits 0:2 - Analog pin select

`impl R<u8, REFSEL_A>`[src]

`pub fn variant(&self) -> REFSEL_A`[src]

Get enumerated values variant

`pub fn is_ref1_8vdd(&self) -> bool`[src]

Checks if the value of the field is REF1_8VDD

`pub fn is_ref2_8vdd(&self) -> bool`[src]

Checks if the value of the field is REF2_8VDD

`pub fn is_ref3_8vdd(&self) -> bool`[src]

Checks if the value of the field is REF3_8VDD

`pub fn is_ref4_8vdd(&self) -> bool`[src]

Checks if the value of the field is REF4_8VDD

`pub fn is_ref5_8vdd(&self) -> bool`[src]

Checks if the value of the field is REF5_8VDD

`pub fn is_ref6_8vdd(&self) -> bool`[src]

Checks if the value of the field is REF6_8VDD

`pub fn is_ref7_8vdd(&self) -> bool`[src]

Checks if the value of the field is REF7_8VDD

`pub fn is_aref(&self) -> bool`[src]

Checks if the value of the field is AREF

`pub fn is_ref1_16vdd(&self) -> bool`[src]

Checks if the value of the field is REF1_16VDD

`pub fn is_ref3_16vdd(&self) -> bool`[src]

Checks if the value of the field is REF3_16VDD

`pub fn is_ref5_16vdd(&self) -> bool`[src]

Checks if the value of the field is REF5_16VDD

`pub fn is_ref7_16vdd(&self) -> bool`[src]

Checks if the value of the field is REF7_16VDD

`pub fn is_ref9_16vdd(&self) -> bool`[src]

Checks if the value of the field is REF9_16VDD

`pub fn is_ref11_16vdd(&self) -> bool`[src]

Checks if the value of the field is REF11_16VDD

`pub fn is_ref13_16vdd(&self) -> bool`[src]

Checks if the value of the field is REF13_16VDD

`pub fn is_ref15_16vdd(&self) -> bool`[src]

Checks if the value of the field is REF15_16VDD

`impl R<u32, Reg<u32, _REFSEL>>`[src]

`pub fn refsel(&self) -> R<u8, REFSEL_A>`[src]

Bits 0:3 - Reference select

`impl R<bool, EXTREFSEL_A>`[src]

`pub fn variant(&self) -> EXTREFSEL_A`[src]

Get enumerated values variant

`pub fn is_analog_reference0(&self) -> bool`[src]

Checks if the value of the field is ANALOGREFERENCE0

`pub fn is_analog_reference1(&self) -> bool`[src]

Checks if the value of the field is ANALOGREFERENCE1

`impl R<u32, Reg<u32, _EXTREFSEL>>`[src]

`pub fn extrefsel(&self) -> R<bool, EXTREFSEL_A>`[src]

Bit 0 - External analog reference select

`impl R<u8, ANADETECT_A>`[src]

`pub fn variant(&self) -> Variant<u8, ANADETECT_A>`[src]

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _INTEN>>`[src]

`pub fn triggered0(&self) -> R<bool, TRIGGERED0_A>`[src]

Bit 0 - Enable or disable interrupt for TRIGGERED[0] event

`pub fn triggered1(&self) -> R<bool, TRIGGERED1_A>`[src]

Bit 1 - Enable or disable interrupt for TRIGGERED[1] event

`pub fn triggered2(&self) -> R<bool, TRIGGERED2_A>`[src]

Bit 2 - Enable or disable interrupt for TRIGGERED[2] event

`pub fn triggered3(&self) -> R<bool, TRIGGERED3_A>`[src]

Bit 3 - Enable or disable interrupt for TRIGGERED[3] event

`pub fn triggered4(&self) -> R<bool, TRIGGERED4_A>`[src]

Bit 4 - Enable or disable interrupt for TRIGGERED[4] event

`pub fn triggered5(&self) -> R<bool, TRIGGERED5_A>`[src]

Bit 5 - Enable or disable interrupt for TRIGGERED[5] event

`pub fn triggered6(&self) -> R<bool, TRIGGERED6_A>`[src]

Bit 6 - Enable or disable interrupt for TRIGGERED[6] event

`pub fn triggered7(&self) -> R<bool, TRIGGERED7_A>`[src]

Bit 7 - Enable or disable interrupt for TRIGGERED[7] event

`pub fn triggered8(&self) -> R<bool, TRIGGERED8_A>`[src]

Bit 8 - Enable or disable interrupt for TRIGGERED[8] event

`pub fn triggered9(&self) -> R<bool, TRIGGERED9_A>`[src]

Bit 9 - Enable or disable interrupt for TRIGGERED[9] event

`pub fn triggered10(&self) -> R<bool, TRIGGERED10_A>`[src]

Bit 10 - Enable or disable interrupt for TRIGGERED[10] event

`pub fn triggered11(&self) -> R<bool, TRIGGERED11_A>`[src]

Bit 11 - Enable or disable interrupt for TRIGGERED[11] event

`pub fn triggered12(&self) -> R<bool, TRIGGERED12_A>`[src]

`pub fn triggered3(&self) -> R<bool, TRIGGERED3_A>`[src]

Bit 3 - Write '1' to Enable interrupt for TRIGGERED[3] event

`pub fn triggered4(&self) -> R<bool, TRIGGERED4_A>`[src]

Bit 4 - Write '1' to Enable interrupt for TRIGGERED[4] event

`pub fn triggered5(&self) -> R<bool, TRIGGERED5_A>`[src]

Bit 5 - Write '1' to Enable interrupt for TRIGGERED[5] event

`pub fn triggered6(&self) -> R<bool, TRIGGERED6_A>`[src]

Bit 6 - Write '1' to Enable interrupt for TRIGGERED[6] event

`pub fn triggered7(&self) -> R<bool, TRIGGERED7_A>`[src]

Bit 7 - Write '1' to Enable interrupt for TRIGGERED[7] event

`pub fn triggered8(&self) -> R<bool, TRIGGERED8_A>`[src]

Bit 8 - Write '1' to Enable interrupt for TRIGGERED[8] event

`pub fn triggered9(&self) -> R<bool, TRIGGERED9_A>`[src]

Bit 9 - Write '1' to Enable interrupt for TRIGGERED[9] event

`pub fn triggered10(&self) -> R<bool, TRIGGERED10_A>`[src]

Bit 10 - Write '1' to Enable interrupt for TRIGGERED[10] event

`pub fn triggered11(&self) -> R<bool, TRIGGERED11_A>`[src]

Bit 11 - Write '1' to Enable interrupt for TRIGGERED[11] event

`pub fn triggered12(&self) -> R<bool, TRIGGERED12_A>`[src]

`pub fn triggered3(&self) -> R<bool, TRIGGERED3_A>`[src]

Bit 3 - Write '1' to Disable interrupt for TRIGGERED[3] event

`pub fn triggered4(&self) -> R<bool, TRIGGERED4_A>`[src]

Bit 4 - Write '1' to Disable interrupt for TRIGGERED[4] event

`pub fn triggered5(&self) -> R<bool, TRIGGERED5_A>`[src]

Bit 5 - Write '1' to Disable interrupt for TRIGGERED[5] event

`pub fn triggered6(&self) -> R<bool, TRIGGERED6_A>`[src]

Bit 6 - Write '1' to Disable interrupt for TRIGGERED[6] event

`pub fn triggered7(&self) -> R<bool, TRIGGERED7_A>`[src]

Bit 7 - Write '1' to Disable interrupt for TRIGGERED[7] event

`pub fn triggered8(&self) -> R<bool, TRIGGERED8_A>`[src]

Bit 8 - Write '1' to Disable interrupt for TRIGGERED[8] event

`pub fn triggered9(&self) -> R<bool, TRIGGERED9_A>`[src]

Bit 9 - Write '1' to Disable interrupt for TRIGGERED[9] event

`pub fn triggered10(&self) -> R<bool, TRIGGERED10_A>`[src]

Bit 10 - Write '1' to Disable interrupt for TRIGGERED[10] event

`pub fn triggered11(&self) -> R<bool, TRIGGERED11_A>`[src]

Bit 11 - Write '1' to Disable interrupt for TRIGGERED[11] event

`pub fn triggered12(&self) -> R<bool, TRIGGERED12_A>`[src]

`pub fn compare3_clear(&self) -> R<bool, COMPARE3_CLEAR_A>`[src]

Bit 3 - Shortcut between COMPARE[3] event and CLEAR task

`pub fn compare4_clear(&self) -> R<bool, COMPARE4_CLEAR_A>`[src]

Bit 4 - Shortcut between COMPARE[4] event and CLEAR task

`pub fn compare5_clear(&self) -> R<bool, COMPARE5_CLEAR_A>`[src]

Bit 5 - Shortcut between COMPARE[5] event and CLEAR task

`pub fn compare0_stop(&self) -> R<bool, COMPARE0_STOP_A>`[src]

Bit 8 - Shortcut between COMPARE[0] event and STOP task

`pub fn compare1_stop(&self) -> R<bool, COMPARE1_STOP_A>`[src]

Bit 9 - Shortcut between COMPARE[1] event and STOP task

`pub fn compare2_stop(&self) -> R<bool, COMPARE2_STOP_A>`[src]

Bit 19 - Write '1' to Disable interrupt for COMPARE[3] event

`pub fn compare4(&self) -> R<bool, COMPARE4_A>`[src]

Bit 20 - Write '1' to Disable interrupt for COMPARE[4] event

`pub fn compare5(&self) -> R<bool, COMPARE5_A>`[src]

Bit 21 - Write '1' to Disable interrupt for COMPARE[5] event

`impl R<u8, MODE_A>`[src]

`pub fn variant(&self) -> Variant<u8, MODE_A>`[src]

Get enumerated values variant

`pub fn is_timer(&self) -> bool`[src]

Checks if the value of the field is TIMER

`pub fn is_counter(&self) -> bool`[src]

Checks if the value of the field is COUNTER

`pub fn is_low_power_counter(&self) -> bool`[src]

Checks if the value of the field is LOWPOWERCOUNTER

`impl R<u32, Reg<u32, _MODE>>`[src]

`pub fn mode(&self) -> R<u8, MODE_A>`[src]

Bits 0:1 - Timer mode

`impl R<u8, BITMODE_A>`[src]

`pub fn variant(&self) -> BITMODE_A`[src]

Get enumerated values variant

`pub fn is_16bit(&self) -> bool`[src]

Checks if the value of the field is _16BIT

`pub fn is_08bit(&self) -> bool`[src]

Checks if the value of the field is _08BIT

`pub fn is_24bit(&self) -> bool`[src]

Checks if the value of the field is _24BIT

`pub fn is_32bit(&self) -> bool`[src]

Checks if the value of the field is _32BIT

`impl R<u32, Reg<u32, _BITMODE>>`[src]

`pub fn bitmode(&self) -> R<u8, BITMODE_A>`[src]

Bits 0:1 - Timer bit width

`impl R<u32, Reg<u32, _PRESCALER>>`[src]

`pub fn prescaler(&self) -> R<u8, u8>`[src]

Bits 0:3 - Prescaler value

`impl R<u32, Reg<u32, _CC>>`[src]

`pub fn cc(&self) -> R<u32, u32>`[src]

Bits 0:31 - Capture/Compare value

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Beginning address in Data RAM of this sequence

`impl R<u16, CNT_A>`[src]

`pub fn variant(&self) -> Variant<u16, CNT_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`impl R<u32, Reg<u32, _CNT>>`[src]

`pub fn cnt(&self) -> R<u16, CNT_A>`[src]

Bits 0:14 - Amount of values (duty cycles) in this sequence

`impl R<u32, CNT_A>`[src]

`pub fn variant(&self) -> Variant<u32, CNT_A>`[src]

Get enumerated values variant

`pub fn is_continuous(&self) -> bool`[src]

Checks if the value of the field is CONTINUOUS

`impl R<u32, Reg<u32, _REFRESH>>`[src]

`pub fn cnt(&self) -> R<u32, CNT_A>`[src]

Bits 0:23 - Amount of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)

`impl R<u32, Reg<u32, _ENDDELAY>>`[src]

`pub fn cnt(&self) -> R<u32, u32>`[src]

Bits 0:23 - Time added after the sequence in PWM periods

`impl R<bool, CONNECT_A>`[src]

`pub fn variant(&self) -> CONNECT_A`[src]

Get enumerated values variant

`pub fn is_disconnected(&self) -> bool`[src]

Checks if the value of the field is DISCONNECTED

`pub fn is_connected(&self) -> bool`[src]

Checks if the value of the field is CONNECTED

Bit 0 - Shortcut between SEQEND[0] event and STOP task

`pub fn seqend1_stop(&self) -> R<bool, SEQEND1_STOP_A>`[src]

`impl R<u32, Reg<u32, _INTEN>>`[src]

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 1 - Enable or disable interrupt for STOPPED event

`pub fn seqstarted0(&self) -> R<bool, SEQSTARTED0_A>`[src]

Bit 2 - Enable or disable interrupt for SEQSTARTED[0] event

`pub fn seqstarted1(&self) -> R<bool, SEQSTARTED1_A>`[src]

Bit 3 - Enable or disable interrupt for SEQSTARTED[1] event

`pub fn seqend0(&self) -> R<bool, SEQEND0_A>`[src]

`impl R<u32, Reg<u32, _INTENSET>>`[src]

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 1 - Write '1' to Enable interrupt for STOPPED event

`pub fn seqstarted0(&self) -> R<bool, SEQSTARTED0_A>`[src]

Bit 2 - Write '1' to Enable interrupt for SEQSTARTED[0] event

`pub fn seqstarted1(&self) -> R<bool, SEQSTARTED1_A>`[src]

Bit 3 - Write '1' to Enable interrupt for SEQSTARTED[1] event

`pub fn seqend0(&self) -> R<bool, SEQEND0_A>`[src]

`impl R<u32, Reg<u32, _INTENCLR>>`[src]

`pub fn stopped(&self) -> R<bool, STOPPED_A>`[src]

Bit 1 - Write '1' to Disable interrupt for STOPPED event

`pub fn seqstarted0(&self) -> R<bool, SEQSTARTED0_A>`[src]

Bit 2 - Write '1' to Disable interrupt for SEQSTARTED[0] event

`pub fn seqstarted1(&self) -> R<bool, SEQSTARTED1_A>`[src]

Bit 3 - Write '1' to Disable interrupt for SEQSTARTED[1] event

`pub fn seqend0(&self) -> R<bool, SEQEND0_A>`[src]

Bit 4 - Write '1' to Disable interrupt for SEQEND[0] event

`pub fn seqend1(&self) -> R<bool, SEQEND1_A>`[src]

Bit 5 - Write '1' to Disable interrupt for SEQEND[1] event

`pub fn pwmperiodend(&self) -> R<bool, PWMPERIODEND_A>`[src]

Bit 6 - Write '1' to Disable interrupt for PWMPERIODEND event

`pub fn loopsdone(&self) -> R<bool, LOOPSDONE_A>`[src]

Bit 7 - Write '1' to Disable interrupt for LOOPSDONE event

`impl R<bool, ENABLE_A>`[src]

`pub fn variant(&self) -> ENABLE_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _ENABLE>>`[src]

`pub fn enable(&self) -> R<bool, ENABLE_A>`[src]

Bit 0 - Enable or disable PWM module

`impl R<bool, UPDOWN_A>`[src]

`pub fn variant(&self) -> UPDOWN_A`[src]

Get enumerated values variant

`pub fn is_up(&self) -> bool`[src]

Checks if the value of the field is UP

`pub fn is_up_and_down(&self) -> bool`[src]

Checks if the value of the field is UPANDDOWN

`impl R<u32, Reg<u32, _MODE>>`[src]

`pub fn updown(&self) -> R<bool, UPDOWN_A>`[src]

Bit 0 - Selects up or up and down as wave counter mode

`impl R<u32, Reg<u32, _COUNTERTOP>>`[src]

`pub fn countertop(&self) -> R<u16, u16>`[src]

Bits 0:14 - Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM will be used.

`impl R<u8, PRESCALER_A>`[src]

`pub fn variant(&self) -> PRESCALER_A`[src]

Get enumerated values variant

`pub fn is_div_1(&self) -> bool`[src]

Checks if the value of the field is DIV_1

`pub fn is_div_2(&self) -> bool`[src]

Checks if the value of the field is DIV_2

`pub fn is_div_4(&self) -> bool`[src]

Checks if the value of the field is DIV_4

`pub fn is_div_8(&self) -> bool`[src]

Checks if the value of the field is DIV_8

`pub fn is_div_16(&self) -> bool`[src]

Checks if the value of the field is DIV_16

`pub fn is_div_32(&self) -> bool`[src]

Checks if the value of the field is DIV_32

`pub fn is_div_64(&self) -> bool`[src]

Checks if the value of the field is DIV_64

`pub fn is_div_128(&self) -> bool`[src]

Checks if the value of the field is DIV_128

`impl R<u32, Reg<u32, _PRESCALER>>`[src]

`pub fn prescaler(&self) -> R<u8, PRESCALER_A>`[src]

Bits 0:2 - Pre-scaler of PWM_CLK

`impl R<u8, LOAD_A>`[src]

`pub fn variant(&self) -> LOAD_A`[src]

Get enumerated values variant

`pub fn is_common(&self) -> bool`[src]

Checks if the value of the field is COMMON

`pub fn is_grouped(&self) -> bool`[src]

Checks if the value of the field is GROUPED

`pub fn is_individual(&self) -> bool`[src]

Checks if the value of the field is INDIVIDUAL

`pub fn is_wave_form(&self) -> bool`[src]

Checks if the value of the field is WAVEFORM

`impl R<bool, MODE_A>`[src]

`pub fn variant(&self) -> MODE_A`[src]

Get enumerated values variant

`pub fn is_refresh_count(&self) -> bool`[src]

Checks if the value of the field is REFRESHCOUNT

`pub fn is_next_step(&self) -> bool`[src]

Checks if the value of the field is NEXTSTEP

`impl R<u32, Reg<u32, _DECODER>>`[src]

`pub fn load(&self) -> R<u8, LOAD_A>`[src]

Bits 0:1 - How a sequence is read from RAM and spread to the compare register

`pub fn mode(&self) -> R<bool, MODE_A>`[src]

Bit 8 - Selects source for advancing the active sequence

`impl R<u16, CNT_A>`[src]

`pub fn variant(&self) -> Variant<u16, CNT_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`impl R<u32, Reg<u32, _LOOP>>`[src]

`pub fn cnt(&self) -> R<u16, CNT_A>`[src]

Bits 0:15 - Amount of playback of pattern cycles

`impl R<bool, CONNECT_A>`[src]

`pub fn variant(&self) -> CONNECT_A`[src]

Get enumerated values variant

`pub fn is_disconnected(&self) -> bool`[src]

Checks if the value of the field is DISCONNECTED

`pub fn is_connected(&self) -> bool`[src]

Checks if the value of the field is CONNECTED

`impl R<u32, Reg<u32, _CLK>>`[src]

`pub fn pin(&self) -> R<u8, u8>`[src]

Bits 0:4 - Pin number

`pub fn connect(&self) -> R<bool, CONNECT_A>`[src]

Bit 31 - Connection

`impl R<bool, CONNECT_A>`[src]

`pub fn variant(&self) -> CONNECT_A`[src]

Get enumerated values variant

`pub fn is_disconnected(&self) -> bool`[src]

Checks if the value of the field is DISCONNECTED

`pub fn is_connected(&self) -> bool`[src]

Checks if the value of the field is CONNECTED

`impl R<u32, Reg<u32, _DIN>>`[src]

`pub fn pin(&self) -> R<u8, u8>`[src]

Bits 0:4 - Pin number

`pub fn connect(&self) -> R<bool, CONNECT_A>`[src]

Bit 31 - Connection

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn sampleptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Address to write PDM samples to over DMA

`pub fn variant(&self) -> Variant<u32, FREQ_A>`[src]

Get enumerated values variant

`pub fn is_1000k(&self) -> bool`[src]

Checks if the value of the field is _1000K

`pub fn is_default(&self) -> bool`[src]

Checks if the value of the field is DEFAULT

`pub fn is_1067k(&self) -> bool`[src]

Checks if the value of the field is _1067K

`impl R<u32, Reg<u32, _PDMCLKCTRL>>`[src]

`pub fn freq(&self) -> R<u32, FREQ_A>`[src]

Bits 0:31 - PDM_CLK frequency

`impl R<bool, OPERATION_A>`[src]

`pub fn variant(&self) -> OPERATION_A`[src]

Get enumerated values variant

`pub fn is_stereo(&self) -> bool`[src]

Checks if the value of the field is STEREO

`pub fn is_mono(&self) -> bool`[src]

Checks if the value of the field is MONO

`impl R<bool, EDGE_A>`[src]

`pub fn variant(&self) -> EDGE_A`[src]

Get enumerated values variant

`pub fn is_left_falling(&self) -> bool`[src]

Checks if the value of the field is LEFTFALLING

`pub fn is_left_rising(&self) -> bool`[src]

Checks if the value of the field is LEFTRISING

`impl R<u32, Reg<u32, _MODE>>`[src]

`pub fn operation(&self) -> R<bool, OPERATION_A>`[src]

Bit 0 - Mono or stereo operation

`pub fn edge(&self) -> R<bool, EDGE_A>`[src]

Bit 1 - Defines on which PDM_CLK edge Left (or mono) is sampled

`impl R<u8, GAINL_A>`[src]

`pub fn variant(&self) -> Variant<u8, GAINL_A>`[src]

Get enumerated values variant

`pub fn is_min_gain(&self) -> bool`[src]

Checks if the value of the field is MINGAIN

`pub fn is_default_gain(&self) -> bool`[src]

Checks if the value of the field is DEFAULTGAIN

`pub fn is_max_gain(&self) -> bool`[src]

Checks if the value of the field is MAXGAIN

`impl R<u32, Reg<u32, _GAINL>>`[src]

`pub fn gainl(&self) -> R<u8, GAINL_A>`[src]

Bits 0:6 - Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust

`impl R<u8, GAINR_A>`[src]

`pub fn variant(&self) -> Variant<u8, GAINR_A>`[src]

Get enumerated values variant

`pub fn is_min_gain(&self) -> bool`[src]

Checks if the value of the field is MINGAIN

`pub fn is_default_gain(&self) -> bool`[src]

Checks if the value of the field is DEFAULTGAIN

`pub fn is_max_gain(&self) -> bool`[src]

Checks if the value of the field is MAXGAIN

`impl R<u32, Reg<u32, _GAINR>>`[src]

`pub fn gainr(&self) -> R<u8, GAINR_A>`[src]

Bits 0:7 - Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters)

`impl R<bool, READY_A>`[src]

`pub fn variant(&self) -> READY_A`[src]

Get enumerated values variant

`pub fn is_busy(&self) -> bool`[src]

Checks if the value of the field is BUSY

`pub fn is_ready(&self) -> bool`[src]

Checks if the value of the field is READY

`impl R<u32, Reg<u32, _READY>>`[src]

`pub fn ready(&self) -> R<bool, READY_A>`[src]

Bit 0 - NVMC is ready or busy

`impl R<u8, WEN_A>`[src]

`pub fn variant(&self) -> Variant<u8, WEN_A>`[src]

Get enumerated values variant

`pub fn is_ren(&self) -> bool`[src]

Checks if the value of the field is REN

`pub fn is_wen(&self) -> bool`[src]

Checks if the value of the field is WEN

`pub fn is_een(&self) -> bool`[src]

Checks if the value of the field is EEN

`impl R<u32, Reg<u32, _CONFIG>>`[src]

`pub fn wen(&self) -> R<u8, WEN_A>`[src]

Bits 0:1 - Program memory access mode. It is strongly recommended to only activate erase and write modes when they are actively used. Enabling write or erase will invalidate the cache and keep it invalidated.

`impl R<u32, Reg<u32, _ERASEPAGE>>`[src]

`pub fn erasepage(&self) -> R<u32, u32>`[src]

Bits 0:31 - Register for starting erase of a page in Code area

`impl R<u32, Reg<u32, _ERASEPCR1>>`[src]

`pub fn erasepcr1(&self) -> R<u32, u32>`[src]

Bits 0:31 - Register for erasing a page in Code area. Equivalent to ERASEPAGE.

`impl R<bool, ERASEALL_A>`[src]

`pub fn variant(&self) -> ERASEALL_A`[src]

Get enumerated values variant

`pub fn is_no_operation(&self) -> bool`[src]

Checks if the value of the field is NOOPERATION

`pub fn is_erase(&self) -> bool`[src]

Checks if the value of the field is ERASE

`impl R<u32, Reg<u32, _ERASEALL>>`[src]

`pub fn eraseall(&self) -> R<bool, ERASEALL_A>`[src]

Bit 0 - Erase all non-volatile memory including UICR registers. Note that code erase has to be enabled by CONFIG.EEN before the UICR can be erased.

`impl R<u32, Reg<u32, _ERASEPCR0>>`[src]

`pub fn erasepcr0(&self) -> R<u32, u32>`[src]

Bits 0:31 - Register for starting erase of a page in Code area. Equivalent to ERASEPAGE.

`impl R<bool, ERASEUICR_A>`[src]

`pub fn variant(&self) -> ERASEUICR_A`[src]

Get enumerated values variant

`pub fn is_no_operation(&self) -> bool`[src]

Checks if the value of the field is NOOPERATION

`pub fn is_erase(&self) -> bool`[src]

Checks if the value of the field is ERASE

`impl R<u32, Reg<u32, _ERASEUICR>>`[src]

`pub fn eraseuicr(&self) -> R<bool, ERASEUICR_A>`[src]

Bit 0 - Register starting erase of all User Information Configuration Registers. Note that code erase has to be enabled by CONFIG.EEN before the UICR can be erased.

`impl R<bool, CACHEEN_A>`[src]

`pub fn variant(&self) -> CACHEEN_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<bool, CACHEPROFEN_A>`[src]

`pub fn variant(&self) -> CACHEPROFEN_A`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _ICACHECNF>>`[src]

`pub fn cacheen(&self) -> R<bool, CACHEEN_A>`[src]

Bit 0 - Cache enable

`pub fn cacheprofen(&self) -> R<bool, CACHEPROFEN_A>`[src]

Bit 8 - Cache profiling enable

`impl R<u32, Reg<u32, _IHIT>>`[src]

`pub fn hits(&self) -> R<u32, u32>`[src]

Bits 0:31 - Number of cache hits

`impl R<u32, Reg<u32, _IMISS>>`[src]

`pub fn misses(&self) -> R<u32, u32>`[src]

Bits 0:31 - Number of cache misses

`impl R<u32, Reg<u32, _EEP>>`[src]

`pub fn eep(&self) -> R<u32, u32>`[src]

Bits 0:31 - Pointer to event register. Accepts only addresses to registers from the Event group.

`impl R<u32, Reg<u32, _TEP>>`[src]

`pub fn tep(&self) -> R<u32, u32>`[src]

Bits 0:31 - Pointer to task register. Accepts only addresses to registers from the Task group.

Checks if the value of the field is DISABLED

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _CHEN>>`[src]

`pub fn ch0(&self) -> R<bool, CH0_A>`[src]

Bit 0 - Enable or disable channel 0

`pub fn ch1(&self) -> R<bool, CH1_A>`[src]

Bit 1 - Enable or disable channel 1

`pub fn ch2(&self) -> R<bool, CH2_A>`[src]

Bit 2 - Enable or disable channel 2

`pub fn ch3(&self) -> R<bool, CH3_A>`[src]

Bit 3 - Enable or disable channel 3

`pub fn ch4(&self) -> R<bool, CH4_A>`[src]

Bit 4 - Enable or disable channel 4

`pub fn ch5(&self) -> R<bool, CH5_A>`[src]

Bit 5 - Enable or disable channel 5

`pub fn ch6(&self) -> R<bool, CH6_A>`[src]

Bit 6 - Enable or disable channel 6

`pub fn ch7(&self) -> R<bool, CH7_A>`[src]

Bit 7 - Enable or disable channel 7

`pub fn ch8(&self) -> R<bool, CH8_A>`[src]

Bit 8 - Enable or disable channel 8

`pub fn ch9(&self) -> R<bool, CH9_A>`[src]

Bit 9 - Enable or disable channel 9

`pub fn ch10(&self) -> R<bool, CH10_A>`[src]

Bit 10 - Enable or disable channel 10

`pub fn ch11(&self) -> R<bool, CH11_A>`[src]

Bit 11 - Enable or disable channel 11

`pub fn ch12(&self) -> R<bool, CH12_A>`[src]

Bit 12 - Enable or disable channel 12

`pub fn ch13(&self) -> R<bool, CH13_A>`[src]

Bit 13 - Enable or disable channel 13

`pub fn ch14(&self) -> R<bool, CH14_A>`[src]

Bit 14 - Enable or disable channel 14

`pub fn ch15(&self) -> R<bool, CH15_A>`[src]

Bit 15 - Enable or disable channel 15

`pub fn ch16(&self) -> R<bool, CH16_A>`[src]

Bit 16 - Enable or disable channel 16

`pub fn ch17(&self) -> R<bool, CH17_A>`[src]

Bit 17 - Enable or disable channel 17

`pub fn ch18(&self) -> R<bool, CH18_A>`[src]

Bit 18 - Enable or disable channel 18

`pub fn ch19(&self) -> R<bool, CH19_A>`[src]

Bit 19 - Enable or disable channel 19

`pub fn ch20(&self) -> R<bool, CH20_A>`[src]

Bit 20 - Enable or disable channel 20

`pub fn ch21(&self) -> R<bool, CH21_A>`[src]

Bit 21 - Enable or disable channel 21

`pub fn ch22(&self) -> R<bool, CH22_A>`[src]

Bit 22 - Enable or disable channel 22

`pub fn ch23(&self) -> R<bool, CH23_A>`[src]

Bit 23 - Enable or disable channel 23

`pub fn ch24(&self) -> R<bool, CH24_A>`[src]

Bit 24 - Enable or disable channel 24

`pub fn ch25(&self) -> R<bool, CH25_A>`[src]

Bit 25 - Enable or disable channel 25

`pub fn ch26(&self) -> R<bool, CH26_A>`[src]

Bit 26 - Enable or disable channel 26

`pub fn ch27(&self) -> R<bool, CH27_A>`[src]

Bit 27 - Enable or disable channel 27

`pub fn ch28(&self) -> R<bool, CH28_A>`[src]

`pub fn ch3(&self) -> R<bool, CH3_A>`[src]

Bit 3 - Channel 3 enable set register. Writing '0' has no effect

`pub fn ch4(&self) -> R<bool, CH4_A>`[src]

Bit 4 - Channel 4 enable set register. Writing '0' has no effect

`pub fn ch5(&self) -> R<bool, CH5_A>`[src]

Bit 5 - Channel 5 enable set register. Writing '0' has no effect

`pub fn ch6(&self) -> R<bool, CH6_A>`[src]

Bit 6 - Channel 6 enable set register. Writing '0' has no effect

`pub fn ch7(&self) -> R<bool, CH7_A>`[src]

Bit 7 - Channel 7 enable set register. Writing '0' has no effect

`pub fn ch8(&self) -> R<bool, CH8_A>`[src]

Bit 8 - Channel 8 enable set register. Writing '0' has no effect

`pub fn ch9(&self) -> R<bool, CH9_A>`[src]

Bit 9 - Channel 9 enable set register. Writing '0' has no effect

`pub fn ch10(&self) -> R<bool, CH10_A>`[src]

Bit 10 - Channel 10 enable set register. Writing '0' has no effect

`pub fn ch11(&self) -> R<bool, CH11_A>`[src]

Bit 11 - Channel 11 enable set register. Writing '0' has no effect

`pub fn ch12(&self) -> R<bool, CH12_A>`[src]

Bit 12 - Channel 12 enable set register. Writing '0' has no effect

`pub fn ch13(&self) -> R<bool, CH13_A>`[src]

Bit 13 - Channel 13 enable set register. Writing '0' has no effect

`pub fn ch14(&self) -> R<bool, CH14_A>`[src]

Bit 14 - Channel 14 enable set register. Writing '0' has no effect

`pub fn ch15(&self) -> R<bool, CH15_A>`[src]

Bit 15 - Channel 15 enable set register. Writing '0' has no effect

`pub fn ch16(&self) -> R<bool, CH16_A>`[src]

Bit 16 - Channel 16 enable set register. Writing '0' has no effect

`pub fn ch17(&self) -> R<bool, CH17_A>`[src]

Bit 17 - Channel 17 enable set register. Writing '0' has no effect

`pub fn ch18(&self) -> R<bool, CH18_A>`[src]

Bit 18 - Channel 18 enable set register. Writing '0' has no effect

`pub fn ch19(&self) -> R<bool, CH19_A>`[src]

Bit 19 - Channel 19 enable set register. Writing '0' has no effect

`pub fn ch20(&self) -> R<bool, CH20_A>`[src]

Bit 20 - Channel 20 enable set register. Writing '0' has no effect

`pub fn ch21(&self) -> R<bool, CH21_A>`[src]

Bit 21 - Channel 21 enable set register. Writing '0' has no effect

`pub fn ch22(&self) -> R<bool, CH22_A>`[src]

Bit 22 - Channel 22 enable set register. Writing '0' has no effect

`pub fn ch23(&self) -> R<bool, CH23_A>`[src]

Bit 23 - Channel 23 enable set register. Writing '0' has no effect

`pub fn ch24(&self) -> R<bool, CH24_A>`[src]

Bit 24 - Channel 24 enable set register. Writing '0' has no effect

`pub fn ch25(&self) -> R<bool, CH25_A>`[src]

Bit 25 - Channel 25 enable set register. Writing '0' has no effect

`pub fn ch26(&self) -> R<bool, CH26_A>`[src]

Bit 26 - Channel 26 enable set register. Writing '0' has no effect

`pub fn ch27(&self) -> R<bool, CH27_A>`[src]

Bit 27 - Channel 27 enable set register. Writing '0' has no effect

`pub fn ch28(&self) -> R<bool, CH28_A>`[src]

Bit 28 - Channel 28 enable set register. Writing '0' has no effect

`pub fn ch29(&self) -> R<bool, CH29_A>`[src]

Bit 29 - Channel 29 enable set register. Writing '0' has no effect

`pub fn ch30(&self) -> R<bool, CH30_A>`[src]

Bit 30 - Channel 30 enable set register. Writing '0' has no effect

`pub fn is_enabled(&self) -> bool`[src]

Checks if the value of the field is ENABLED

`impl R<u32, Reg<u32, _CHENCLR>>`[src]

`pub fn ch0(&self) -> R<bool, CH0_A>`[src]

Bit 0 - Channel 0 enable clear register. Writing '0' has no effect

`pub fn ch1(&self) -> R<bool, CH1_A>`[src]

Bit 1 - Channel 1 enable clear register. Writing '0' has no effect

`pub fn ch2(&self) -> R<bool, CH2_A>`[src]

Bit 2 - Channel 2 enable clear register. Writing '0' has no effect

`pub fn ch3(&self) -> R<bool, CH3_A>`[src]

Bit 3 - Channel 3 enable clear register. Writing '0' has no effect

`pub fn ch4(&self) -> R<bool, CH4_A>`[src]

Bit 4 - Channel 4 enable clear register. Writing '0' has no effect

`pub fn ch5(&self) -> R<bool, CH5_A>`[src]

Bit 5 - Channel 5 enable clear register. Writing '0' has no effect

`pub fn ch6(&self) -> R<bool, CH6_A>`[src]

Bit 6 - Channel 6 enable clear register. Writing '0' has no effect

`pub fn ch7(&self) -> R<bool, CH7_A>`[src]

Bit 7 - Channel 7 enable clear register. Writing '0' has no effect

`pub fn ch8(&self) -> R<bool, CH8_A>`[src]

Bit 8 - Channel 8 enable clear register. Writing '0' has no effect

`pub fn ch9(&self) -> R<bool, CH9_A>`[src]

Bit 9 - Channel 9 enable clear register. Writing '0' has no effect

`pub fn ch10(&self) -> R<bool, CH10_A>`[src]

Bit 10 - Channel 10 enable clear register. Writing '0' has no effect

`pub fn ch11(&self) -> R<bool, CH11_A>`[src]

Bit 11 - Channel 11 enable clear register. Writing '0' has no effect

`pub fn ch12(&self) -> R<bool, CH12_A>`[src]

Bit 12 - Channel 12 enable clear register. Writing '0' has no effect

`pub fn ch13(&self) -> R<bool, CH13_A>`[src]

Bit 13 - Channel 13 enable clear register. Writing '0' has no effect

`pub fn ch14(&self) -> R<bool, CH14_A>`[src]

Bit 14 - Channel 14 enable clear register. Writing '0' has no effect

`pub fn ch15(&self) -> R<bool, CH15_A>`[src]

Bit 15 - Channel 15 enable clear register. Writing '0' has no effect

`pub fn ch16(&self) -> R<bool, CH16_A>`[src]

Bit 16 - Channel 16 enable clear register. Writing '0' has no effect

`pub fn ch17(&self) -> R<bool, CH17_A>`[src]

Bit 17 - Channel 17 enable clear register. Writing '0' has no effect

`pub fn ch18(&self) -> R<bool, CH18_A>`[src]

Bit 18 - Channel 18 enable clear register. Writing '0' has no effect

`pub fn ch19(&self) -> R<bool, CH19_A>`[src]

Bit 19 - Channel 19 enable clear register. Writing '0' has no effect

`pub fn ch20(&self) -> R<bool, CH20_A>`[src]

Bit 20 - Channel 20 enable clear register. Writing '0' has no effect

`pub fn ch21(&self) -> R<bool, CH21_A>`[src]

Bit 21 - Channel 21 enable clear register. Writing '0' has no effect

`pub fn ch22(&self) -> R<bool, CH22_A>`[src]

Bit 22 - Channel 22 enable clear register. Writing '0' has no effect

`pub fn ch23(&self) -> R<bool, CH23_A>`[src]

Bit 23 - Channel 23 enable clear register. Writing '0' has no effect

`pub fn ch24(&self) -> R<bool, CH24_A>`[src]

Bit 24 - Channel 24 enable clear register. Writing '0' has no effect

`pub fn ch25(&self) -> R<bool, CH25_A>`[src]

Bit 25 - Channel 25 enable clear register. Writing '0' has no effect

`pub fn ch26(&self) -> R<bool, CH26_A>`[src]

Bit 26 - Channel 26 enable clear register. Writing '0' has no effect

`pub fn ch27(&self) -> R<bool, CH27_A>`[src]

Bit 27 - Channel 27 enable clear register. Writing '0' has no effect

`pub fn ch28(&self) -> R<bool, CH28_A>`[src]

`pub fn ch3(&self) -> R<bool, CH3_A>`[src]

Bit 3 - Include or exclude channel 3

`pub fn ch4(&self) -> R<bool, CH4_A>`[src]

Bit 4 - Include or exclude channel 4

`pub fn ch5(&self) -> R<bool, CH5_A>`[src]

Bit 5 - Include or exclude channel 5

`pub fn ch6(&self) -> R<bool, CH6_A>`[src]

Bit 6 - Include or exclude channel 6

`pub fn ch7(&self) -> R<bool, CH7_A>`[src]

Bit 7 - Include or exclude channel 7

`pub fn ch8(&self) -> R<bool, CH8_A>`[src]

Bit 8 - Include or exclude channel 8

`pub fn ch9(&self) -> R<bool, CH9_A>`[src]

Bit 9 - Include or exclude channel 9

`pub fn ch10(&self) -> R<bool, CH10_A>`[src]

Bit 10 - Include or exclude channel 10

`pub fn ch11(&self) -> R<bool, CH11_A>`[src]

Bit 11 - Include or exclude channel 11

`pub fn ch12(&self) -> R<bool, CH12_A>`[src]

Bit 12 - Include or exclude channel 12

`pub fn ch13(&self) -> R<bool, CH13_A>`[src]

Bit 13 - Include or exclude channel 13

`pub fn ch14(&self) -> R<bool, CH14_A>`[src]

Bit 14 - Include or exclude channel 14

`pub fn ch15(&self) -> R<bool, CH15_A>`[src]

Bit 15 - Include or exclude channel 15

`pub fn ch16(&self) -> R<bool, CH16_A>`[src]

Bit 16 - Include or exclude channel 16

`pub fn ch17(&self) -> R<bool, CH17_A>`[src]

Bit 17 - Include or exclude channel 17

`pub fn ch18(&self) -> R<bool, CH18_A>`[src]

Bit 18 - Include or exclude channel 18

`pub fn ch19(&self) -> R<bool, CH19_A>`[src]

Bit 19 - Include or exclude channel 19

`pub fn ch20(&self) -> R<bool, CH20_A>`[src]

Bit 20 - Include or exclude channel 20

`pub fn ch21(&self) -> R<bool, CH21_A>`[src]

Bit 21 - Include or exclude channel 21

`pub fn ch22(&self) -> R<bool, CH22_A>`[src]

Bit 22 - Include or exclude channel 22

`pub fn ch23(&self) -> R<bool, CH23_A>`[src]

Bit 23 - Include or exclude channel 23

`pub fn ch24(&self) -> R<bool, CH24_A>`[src]

Bit 24 - Include or exclude channel 24

`pub fn ch25(&self) -> R<bool, CH25_A>`[src]

Bit 25 - Include or exclude channel 25

`pub fn ch26(&self) -> R<bool, CH26_A>`[src]

Bit 26 - Include or exclude channel 26

`pub fn ch27(&self) -> R<bool, CH27_A>`[src]

Bit 27 - Include or exclude channel 27

`pub fn ch28(&self) -> R<bool, CH28_A>`[src]

Bit 28 - Include or exclude channel 28

`pub fn ch29(&self) -> R<bool, CH29_A>`[src]

Bit 29 - Include or exclude channel 29

`pub fn ch30(&self) -> R<bool, CH30_A>`[src]

Bit 30 - Include or exclude channel 30

`pub fn is_access(&self) -> bool`[src]

Checks if the value of the field is ACCESS

`impl R<u32, Reg<u32, _SUBSTATWA>>`[src]

`pub fn sr0(&self) -> R<bool, SR0_A>`[src]

Bit 0 - Subregion 0 in region 0 (write '1' to clear)

`pub fn sr1(&self) -> R<bool, SR1_A>`[src]

Bit 1 - Subregion 1 in region 0 (write '1' to clear)

`pub fn sr2(&self) -> R<bool, SR2_A>`[src]

Bit 2 - Subregion 2 in region 0 (write '1' to clear)

`pub fn sr3(&self) -> R<bool, SR3_A>`[src]

Bit 3 - Subregion 3 in region 0 (write '1' to clear)

`pub fn sr4(&self) -> R<bool, SR4_A>`[src]

Bit 4 - Subregion 4 in region 0 (write '1' to clear)

`pub fn sr5(&self) -> R<bool, SR5_A>`[src]

Bit 5 - Subregion 5 in region 0 (write '1' to clear)

`pub fn sr6(&self) -> R<bool, SR6_A>`[src]

Bit 6 - Subregion 6 in region 0 (write '1' to clear)

`pub fn sr7(&self) -> R<bool, SR7_A>`[src]

Bit 7 - Subregion 7 in region 0 (write '1' to clear)

`pub fn sr8(&self) -> R<bool, SR8_A>`[src]

Bit 8 - Subregion 8 in region 0 (write '1' to clear)

`pub fn sr9(&self) -> R<bool, SR9_A>`[src]

Bit 9 - Subregion 9 in region 0 (write '1' to clear)

`pub fn sr10(&self) -> R<bool, SR10_A>`[src]

Bit 10 - Subregion 10 in region 0 (write '1' to clear)

`pub fn sr11(&self) -> R<bool, SR11_A>`[src]

Bit 11 - Subregion 11 in region 0 (write '1' to clear)

`pub fn sr12(&self) -> R<bool, SR12_A>`[src]

Bit 12 - Subregion 12 in region 0 (write '1' to clear)

`pub fn sr13(&self) -> R<bool, SR13_A>`[src]

Bit 13 - Subregion 13 in region 0 (write '1' to clear)

`pub fn sr14(&self) -> R<bool, SR14_A>`[src]

Bit 14 - Subregion 14 in region 0 (write '1' to clear)

`pub fn sr15(&self) -> R<bool, SR15_A>`[src]

Bit 15 - Subregion 15 in region 0 (write '1' to clear)

`pub fn sr16(&self) -> R<bool, SR16_A>`[src]

Bit 16 - Subregion 16 in region 0 (write '1' to clear)

`pub fn sr17(&self) -> R<bool, SR17_A>`[src]

Bit 17 - Subregion 17 in region 0 (write '1' to clear)

`pub fn sr18(&self) -> R<bool, SR18_A>`[src]

Bit 18 - Subregion 18 in region 0 (write '1' to clear)

`pub fn sr19(&self) -> R<bool, SR19_A>`[src]

Bit 19 - Subregion 19 in region 0 (write '1' to clear)

`pub fn sr20(&self) -> R<bool, SR20_A>`[src]

Bit 20 - Subregion 20 in region 0 (write '1' to clear)

`pub fn sr21(&self) -> R<bool, SR21_A>`[src]

Bit 21 - Subregion 21 in region 0 (write '1' to clear)

`pub fn sr22(&self) -> R<bool, SR22_A>`[src]

Bit 22 - Subregion 22 in region 0 (write '1' to clear)

`pub fn sr23(&self) -> R<bool, SR23_A>`[src]

Bit 23 - Subregion 23 in region 0 (write '1' to clear)

`pub fn sr24(&self) -> R<bool, SR24_A>`[src]

Bit 24 - Subregion 24 in region 0 (write '1' to clear)

`pub fn sr25(&self) -> R<bool, SR25_A>`[src]

Bit 25 - Subregion 25 in region 0 (write '1' to clear)

`pub fn sr26(&self) -> R<bool, SR26_A>`[src]

Bit 26 - Subregion 26 in region 0 (write '1' to clear)

`pub fn sr27(&self) -> R<bool, SR27_A>`[src]

Bit 27 - Subregion 27 in region 0 (write '1' to clear)

`pub fn sr28(&self) -> R<bool, SR28_A>`[src]

`pub fn sr3(&self) -> R<bool, SR3_A>`[src]

Bit 3 - Subregion 3 in region 0 (write '1' to clear)

`pub fn sr4(&self) -> R<bool, SR4_A>`[src]

Bit 4 - Subregion 4 in region 0 (write '1' to clear)

`pub fn sr5(&self) -> R<bool, SR5_A>`[src]

Bit 5 - Subregion 5 in region 0 (write '1' to clear)

`pub fn sr6(&self) -> R<bool, SR6_A>`[src]

Bit 6 - Subregion 6 in region 0 (write '1' to clear)

`pub fn sr7(&self) -> R<bool, SR7_A>`[src]

Bit 7 - Subregion 7 in region 0 (write '1' to clear)

`pub fn sr8(&self) -> R<bool, SR8_A>`[src]

Bit 8 - Subregion 8 in region 0 (write '1' to clear)

`pub fn sr9(&self) -> R<bool, SR9_A>`[src]

Bit 9 - Subregion 9 in region 0 (write '1' to clear)

`pub fn sr10(&self) -> R<bool, SR10_A>`[src]

Bit 10 - Subregion 10 in region 0 (write '1' to clear)

`pub fn sr11(&self) -> R<bool, SR11_A>`[src]

Bit 11 - Subregion 11 in region 0 (write '1' to clear)

`pub fn sr12(&self) -> R<bool, SR12_A>`[src]

Bit 12 - Subregion 12 in region 0 (write '1' to clear)

`pub fn sr13(&self) -> R<bool, SR13_A>`[src]

Bit 13 - Subregion 13 in region 0 (write '1' to clear)

`pub fn sr14(&self) -> R<bool, SR14_A>`[src]

Bit 14 - Subregion 14 in region 0 (write '1' to clear)

`pub fn sr15(&self) -> R<bool, SR15_A>`[src]

Bit 15 - Subregion 15 in region 0 (write '1' to clear)

`pub fn sr16(&self) -> R<bool, SR16_A>`[src]

Bit 16 - Subregion 16 in region 0 (write '1' to clear)

`pub fn sr17(&self) -> R<bool, SR17_A>`[src]

Bit 17 - Subregion 17 in region 0 (write '1' to clear)

`pub fn sr18(&self) -> R<bool, SR18_A>`[src]

Bit 18 - Subregion 18 in region 0 (write '1' to clear)

`pub fn sr19(&self) -> R<bool, SR19_A>`[src]

Bit 19 - Subregion 19 in region 0 (write '1' to clear)

`pub fn sr20(&self) -> R<bool, SR20_A>`[src]

Bit 20 - Subregion 20 in region 0 (write '1' to clear)

`pub fn sr21(&self) -> R<bool, SR21_A>`[src]

Bit 21 - Subregion 21 in region 0 (write '1' to clear)

`pub fn sr22(&self) -> R<bool, SR22_A>`[src]

Bit 22 - Subregion 22 in region 0 (write '1' to clear)

`pub fn sr23(&self) -> R<bool, SR23_A>`[src]

Bit 23 - Subregion 23 in region 0 (write '1' to clear)

`pub fn sr24(&self) -> R<bool, SR24_A>`[src]

Bit 24 - Subregion 24 in region 0 (write '1' to clear)

`pub fn sr25(&self) -> R<bool, SR25_A>`[src]

Bit 25 - Subregion 25 in region 0 (write '1' to clear)

`pub fn sr26(&self) -> R<bool, SR26_A>`[src]

Bit 26 - Subregion 26 in region 0 (write '1' to clear)

`pub fn sr27(&self) -> R<bool, SR27_A>`[src]

Bit 27 - Subregion 27 in region 0 (write '1' to clear)

`pub fn sr28(&self) -> R<bool, SR28_A>`[src]

Bit 28 - Subregion 28 in region 0 (write '1' to clear)

`pub fn sr29(&self) -> R<bool, SR29_A>`[src]

Bit 29 - Subregion 29 in region 0 (write '1' to clear)

`pub fn sr30(&self) -> R<bool, SR30_A>`[src]

Bit 30 - Subregion 30 in region 0 (write '1' to clear)

`pub fn sr31(&self) -> R<bool, SR31_A>`[src]

Bit 31 - Subregion 31 in region 0 (write '1' to clear)

`impl R<u32, Reg<u32, _START>>`[src]

`pub fn start(&self) -> R<u32, u32>`[src]

Bits 0:31 - Start address for region

`impl R<u32, Reg<u32, _END>>`[src]

`pub fn end(&self) -> R<u32, u32>`[src]

Bits 0:31 - End address of region.

`impl R<u32, Reg<u32, _START>>`[src]

`pub fn start(&self) -> R<u32, u32>`[src]

Bits 0:31 - Reserved for future use

Checks if the value of the field is EXCLUDE

`pub fn is_include(&self) -> bool`[src]

Checks if the value of the field is INCLUDE

`impl R<u32, Reg<u32, _SUBS>>`[src]

`pub fn sr0(&self) -> R<bool, SR0_A>`[src]

Bit 0 - Include or exclude subregion 0 in region

`pub fn sr1(&self) -> R<bool, SR1_A>`[src]

Bit 1 - Include or exclude subregion 1 in region

`pub fn sr2(&self) -> R<bool, SR2_A>`[src]

Bit 2 - Include or exclude subregion 2 in region

`pub fn sr3(&self) -> R<bool, SR3_A>`[src]

Bit 3 - Include or exclude subregion 3 in region

`pub fn sr4(&self) -> R<bool, SR4_A>`[src]

Bit 4 - Include or exclude subregion 4 in region

`pub fn sr5(&self) -> R<bool, SR5_A>`[src]

Bit 5 - Include or exclude subregion 5 in region

`pub fn sr6(&self) -> R<bool, SR6_A>`[src]

Bit 6 - Include or exclude subregion 6 in region

`pub fn sr7(&self) -> R<bool, SR7_A>`[src]

Bit 7 - Include or exclude subregion 7 in region

`pub fn sr8(&self) -> R<bool, SR8_A>`[src]

Bit 8 - Include or exclude subregion 8 in region

`pub fn sr9(&self) -> R<bool, SR9_A>`[src]

Bit 9 - Include or exclude subregion 9 in region

`pub fn sr10(&self) -> R<bool, SR10_A>`[src]

Bit 10 - Include or exclude subregion 10 in region

`pub fn sr11(&self) -> R<bool, SR11_A>`[src]

Bit 11 - Include or exclude subregion 11 in region

`pub fn sr12(&self) -> R<bool, SR12_A>`[src]

Bit 12 - Include or exclude subregion 12 in region

`pub fn sr13(&self) -> R<bool, SR13_A>`[src]

Bit 13 - Include or exclude subregion 13 in region

`pub fn sr14(&self) -> R<bool, SR14_A>`[src]

Bit 14 - Include or exclude subregion 14 in region

`pub fn sr15(&self) -> R<bool, SR15_A>`[src]

Bit 15 - Include or exclude subregion 15 in region

`pub fn sr16(&self) -> R<bool, SR16_A>`[src]

Bit 16 - Include or exclude subregion 16 in region

`pub fn sr17(&self) -> R<bool, SR17_A>`[src]

Bit 17 - Include or exclude subregion 17 in region

`pub fn sr18(&self) -> R<bool, SR18_A>`[src]

Bit 18 - Include or exclude subregion 18 in region

`pub fn sr19(&self) -> R<bool, SR19_A>`[src]

Bit 19 - Include or exclude subregion 19 in region

`pub fn sr20(&self) -> R<bool, SR20_A>`[src]

Bit 20 - Include or exclude subregion 20 in region

`pub fn sr21(&self) -> R<bool, SR21_A>`[src]

Bit 21 - Include or exclude subregion 21 in region

`pub fn sr22(&self) -> R<bool, SR22_A>`[src]

Bit 22 - Include or exclude subregion 22 in region

`pub fn sr23(&self) -> R<bool, SR23_A>`[src]

Bit 23 - Include or exclude subregion 23 in region

`pub fn sr24(&self) -> R<bool, SR24_A>`[src]

Bit 24 - Include or exclude subregion 24 in region

`pub fn sr25(&self) -> R<bool, SR25_A>`[src]

Bit 25 - Include or exclude subregion 25 in region

`pub fn sr26(&self) -> R<bool, SR26_A>`[src]

Bit 26 - Include or exclude subregion 26 in region

`pub fn sr27(&self) -> R<bool, SR27_A>`[src]

Bit 27 - Include or exclude subregion 27 in region

`pub fn sr28(&self) -> R<bool, SR28_A>`[src]

`pub fn region1ra(&self) -> R<bool, REGION1RA_A>`[src]

Bit 3 - Enable or disable interrupt for REGION[1].RA event

`pub fn region2wa(&self) -> R<bool, REGION2WA_A>`[src]

Bit 4 - Enable or disable interrupt for REGION[2].WA event

`pub fn region2ra(&self) -> R<bool, REGION2RA_A>`[src]

Bit 5 - Enable or disable interrupt for REGION[2].RA event

`pub fn region3wa(&self) -> R<bool, REGION3WA_A>`[src]

Bit 6 - Enable or disable interrupt for REGION[3].WA event

`pub fn region3ra(&self) -> R<bool, REGION3RA_A>`[src]

Bit 7 - Enable or disable interrupt for REGION[3].RA event

`pub fn pregion0wa(&self) -> R<bool, PREGION0WA_A>`[src]

`pub fn region1ra(&self) -> R<bool, REGION1RA_A>`[src]

Bit 3 - Write '1' to Enable interrupt for REGION[1].RA event

`pub fn region2wa(&self) -> R<bool, REGION2WA_A>`[src]

Bit 4 - Write '1' to Enable interrupt for REGION[2].WA event

`pub fn region2ra(&self) -> R<bool, REGION2RA_A>`[src]

Bit 5 - Write '1' to Enable interrupt for REGION[2].RA event

`pub fn region3wa(&self) -> R<bool, REGION3WA_A>`[src]

Bit 6 - Write '1' to Enable interrupt for REGION[3].WA event

`pub fn region3ra(&self) -> R<bool, REGION3RA_A>`[src]

Bit 7 - Write '1' to Enable interrupt for REGION[3].RA event

`pub fn pregion0wa(&self) -> R<bool, PREGION0WA_A>`[src]

`pub fn region1ra(&self) -> R<bool, REGION1RA_A>`[src]

Bit 3 - Write '1' to Disable interrupt for REGION[1].RA event

`pub fn region2wa(&self) -> R<bool, REGION2WA_A>`[src]

Bit 4 - Write '1' to Disable interrupt for REGION[2].WA event

`pub fn region2ra(&self) -> R<bool, REGION2RA_A>`[src]

Bit 5 - Write '1' to Disable interrupt for REGION[2].RA event

`pub fn region3wa(&self) -> R<bool, REGION3WA_A>`[src]

Bit 6 - Write '1' to Disable interrupt for REGION[3].WA event

`pub fn region3ra(&self) -> R<bool, REGION3RA_A>`[src]

Bit 7 - Write '1' to Disable interrupt for REGION[3].RA event

`pub fn pregion0wa(&self) -> R<bool, PREGION0WA_A>`[src]

`pub fn region1ra(&self) -> R<bool, REGION1RA_A>`[src]

Bit 3 - Enable or disable non-maskable interrupt for REGION[1].RA event

`pub fn region2wa(&self) -> R<bool, REGION2WA_A>`[src]

Bit 4 - Enable or disable non-maskable interrupt for REGION[2].WA event

`pub fn region2ra(&self) -> R<bool, REGION2RA_A>`[src]

Bit 5 - Enable or disable non-maskable interrupt for REGION[2].RA event

`pub fn region3wa(&self) -> R<bool, REGION3WA_A>`[src]

Bit 6 - Enable or disable non-maskable interrupt for REGION[3].WA event

`pub fn region3ra(&self) -> R<bool, REGION3RA_A>`[src]

Bit 7 - Enable or disable non-maskable interrupt for REGION[3].RA event

`pub fn pregion0wa(&self) -> R<bool, PREGION0WA_A>`[src]

`pub fn region1ra(&self) -> R<bool, REGION1RA_A>`[src]

Bit 3 - Write '1' to Enable non-maskable interrupt for REGION[1].RA event

`pub fn region2wa(&self) -> R<bool, REGION2WA_A>`[src]

Bit 4 - Write '1' to Enable non-maskable interrupt for REGION[2].WA event

`pub fn region2ra(&self) -> R<bool, REGION2RA_A>`[src]

Bit 5 - Write '1' to Enable non-maskable interrupt for REGION[2].RA event

`pub fn region3wa(&self) -> R<bool, REGION3WA_A>`[src]

Bit 6 - Write '1' to Enable non-maskable interrupt for REGION[3].WA event

`pub fn region3ra(&self) -> R<bool, REGION3RA_A>`[src]

Bit 7 - Write '1' to Enable non-maskable interrupt for REGION[3].RA event

`pub fn pregion0wa(&self) -> R<bool, PREGION0WA_A>`[src]

`pub fn region1ra(&self) -> R<bool, REGION1RA_A>`[src]

Bit 3 - Write '1' to Disable non-maskable interrupt for REGION[1].RA event

`pub fn region2wa(&self) -> R<bool, REGION2WA_A>`[src]

Bit 4 - Write '1' to Disable non-maskable interrupt for REGION[2].WA event

`pub fn region2ra(&self) -> R<bool, REGION2RA_A>`[src]

Bit 5 - Write '1' to Disable non-maskable interrupt for REGION[2].RA event

`pub fn region3wa(&self) -> R<bool, REGION3WA_A>`[src]

Bit 6 - Write '1' to Disable non-maskable interrupt for REGION[3].WA event

`pub fn region3ra(&self) -> R<bool, REGION3RA_A>`[src]

Bit 7 - Write '1' to Disable non-maskable interrupt for REGION[3].RA event

`pub fn pregion0wa(&self) -> R<bool, PREGION0WA_A>`[src]

`pub fn rgn1ra(&self) -> R<bool, RGN1RA_A>`[src]

Bit 3 - Enable/disable read access watch in region[1]

`pub fn rgn2wa(&self) -> R<bool, RGN2WA_A>`[src]

Bit 4 - Enable/disable write access watch in region[2]

`pub fn rgn2ra(&self) -> R<bool, RGN2RA_A>`[src]

Bit 5 - Enable/disable read access watch in region[2]

`pub fn rgn3wa(&self) -> R<bool, RGN3WA_A>`[src]

Bit 6 - Enable/disable write access watch in region[3]

`pub fn rgn3ra(&self) -> R<bool, RGN3RA_A>`[src]

Bit 7 - Enable/disable read access watch in region[3]

`pub fn prgn0wa(&self) -> R<bool, PRGN0WA_A>`[src]

`pub fn rgn1ra(&self) -> R<bool, RGN1RA_A>`[src]

Bit 3 - Enable read access watch in region[1]

`pub fn rgn2wa(&self) -> R<bool, RGN2WA_A>`[src]

Bit 4 - Enable write access watch in region[2]

`pub fn rgn2ra(&self) -> R<bool, RGN2RA_A>`[src]

Bit 5 - Enable read access watch in region[2]

`pub fn rgn3wa(&self) -> R<bool, RGN3WA_A>`[src]

Bit 6 - Enable write access watch in region[3]

`pub fn rgn3ra(&self) -> R<bool, RGN3RA_A>`[src]

Bit 7 - Enable read access watch in region[3]

`pub fn prgn0wa(&self) -> R<bool, PRGN0WA_A>`[src]

`pub fn rgn1ra(&self) -> R<bool, RGN1RA_A>`[src]

Bit 3 - Disable read access watch in region[1]

`pub fn rgn2wa(&self) -> R<bool, RGN2WA_A>`[src]

Bit 4 - Disable write access watch in region[2]

`pub fn rgn2ra(&self) -> R<bool, RGN2RA_A>`[src]

Bit 5 - Disable read access watch in region[2]

`pub fn rgn3wa(&self) -> R<bool, RGN3WA_A>`[src]

Bit 6 - Disable write access watch in region[3]

`pub fn rgn3ra(&self) -> R<bool, RGN3RA_A>`[src]

Bit 7 - Disable read access watch in region[3]

`pub fn prgn0wa(&self) -> R<bool, PRGN0WA_A>`[src]

Bit 24 - Disable write access watch in PREGION[0]

`pub fn prgn0ra(&self) -> R<bool, PRGN0RA_A>`[src]

Bit 25 - Disable read access watch in PREGION[0]

`pub fn prgn1wa(&self) -> R<bool, PRGN1WA_A>`[src]

`pub fn is_32mdiv4(&self) -> bool`[src]

Checks if the value of the field is _32MDIV4

`pub fn is_32mdiv5(&self) -> bool`[src]

Checks if the value of the field is _32MDIV5

`pub fn is_32mdiv6(&self) -> bool`[src]

Checks if the value of the field is _32MDIV6

`pub fn is_32mdiv8(&self) -> bool`[src]

Checks if the value of the field is _32MDIV8

`pub fn is_32mdiv10(&self) -> bool`[src]

Checks if the value of the field is _32MDIV10

`pub fn is_32mdiv11(&self) -> bool`[src]

Checks if the value of the field is _32MDIV11

`pub fn is_32mdiv15(&self) -> bool`[src]

Checks if the value of the field is _32MDIV15

`pub fn is_32mdiv16(&self) -> bool`[src]

Checks if the value of the field is _32MDIV16

`pub fn is_32mdiv21(&self) -> bool`[src]

Checks if the value of the field is _32MDIV21

`pub fn is_32mdiv23(&self) -> bool`[src]

Checks if the value of the field is _32MDIV23

`pub fn is_32mdiv30(&self) -> bool`[src]

Checks if the value of the field is _32MDIV30

`pub fn is_32mdiv31(&self) -> bool`[src]

Checks if the value of the field is _32MDIV31

`pub fn is_32mdiv32(&self) -> bool`[src]

Checks if the value of the field is _32MDIV32

`pub fn is_32mdiv42(&self) -> bool`[src]

Checks if the value of the field is _32MDIV42

`pub fn is_32mdiv63(&self) -> bool`[src]

Checks if the value of the field is _32MDIV63

`pub fn is_32mdiv125(&self) -> bool`[src]

Checks if the value of the field is _32MDIV125

`impl R<u32, Reg<u32, _MCKFREQ>>`[src]

`pub fn mckfreq(&self) -> R<u32, MCKFREQ_A>`[src]

Bits 0:31 - Master clock generator frequency.

`impl R<u8, RATIO_A>`[src]

`pub fn variant(&self) -> Variant<u8, RATIO_A>`[src]

Get enumerated values variant

`pub fn is_32x(&self) -> bool`[src]

Checks if the value of the field is _32X

`pub fn is_48x(&self) -> bool`[src]

Checks if the value of the field is _48X

`pub fn is_64x(&self) -> bool`[src]

Checks if the value of the field is _64X

`pub fn is_96x(&self) -> bool`[src]

Checks if the value of the field is _96X

`pub fn is_128x(&self) -> bool`[src]

Checks if the value of the field is _128X

`pub fn is_192x(&self) -> bool`[src]

Checks if the value of the field is _192X

`pub fn is_256x(&self) -> bool`[src]

Checks if the value of the field is _256X

`pub fn is_384x(&self) -> bool`[src]

Checks if the value of the field is _384X

`pub fn is_512x(&self) -> bool`[src]

Checks if the value of the field is _512X

`impl R<u32, Reg<u32, _RATIO>>`[src]

`pub fn ratio(&self) -> R<u8, RATIO_A>`[src]

Bits 0:3 - MCK / LRCK ratio.

`impl R<u8, SWIDTH_A>`[src]

`pub fn variant(&self) -> Variant<u8, SWIDTH_A>`[src]

`impl R<u8, CHANNELS_A>`[src]

`pub fn variant(&self) -> Variant<u8, CHANNELS_A>`[src]

Get enumerated values variant

`pub fn is_stereo(&self) -> bool`[src]

Checks if the value of the field is STEREO

`pub fn is_left(&self) -> bool`[src]

Checks if the value of the field is LEFT

`pub fn is_right(&self) -> bool`[src]

Checks if the value of the field is RIGHT

`impl R<u32, Reg<u32, _CHANNELS>>`[src]

`pub fn channels(&self) -> R<u8, CHANNELS_A>`[src]

Bits 0:1 - Enable channels.

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Receive buffer Data RAM start address. When receiving, words containing samples will be written to this address. This address is a word aligned Data RAM address.

`impl R<u32, Reg<u32, _PTR>>`[src]

`pub fn ptr(&self) -> R<u32, u32>`[src]

Bits 0:31 - Transmit buffer Data RAM start address. When transmitting, words containing samples will be fetched from this address. This address is a word aligned Data RAM address.

Checks if the value of the field is HIGH

`impl R<u32, Reg<u32, _OUT>>`[src]

`pub fn pin0(&self) -> R<bool, PIN0_A>`[src]

Bit 0 - Pin 0

`pub fn pin1(&self) -> R<bool, PIN1_A>`[src]

Bit 1 - Pin 1

`pub fn pin2(&self) -> R<bool, PIN2_A>`[src]

Bit 2 - Pin 2

`pub fn pin3(&self) -> R<bool, PIN3_A>`[src]

Bit 3 - Pin 3

`pub fn pin4(&self) -> R<bool, PIN4_A>`[src]

Bit 4 - Pin 4

`pub fn pin5(&self) -> R<bool, PIN5_A>`[src]

Bit 5 - Pin 5

`pub fn pin6(&self) -> R<bool, PIN6_A>`[src]

Bit 6 - Pin 6

`pub fn pin7(&self) -> R<bool, PIN7_A>`[src]

Bit 7 - Pin 7

`pub fn pin8(&self) -> R<bool, PIN8_A>`[src]

Bit 8 - Pin 8

`pub fn pin9(&self) -> R<bool, PIN9_A>`[src]

Bit 9 - Pin 9

`pub fn pin10(&self) -> R<bool, PIN10_A>`[src]

Bit 10 - Pin 10

`pub fn pin11(&self) -> R<bool, PIN11_A>`[src]

Bit 11 - Pin 11

`pub fn pin12(&self) -> R<bool, PIN12_A>`[src]

Bit 12 - Pin 12

`pub fn pin13(&self) -> R<bool, PIN13_A>`[src]

Bit 13 - Pin 13

`pub fn pin14(&self) -> R<bool, PIN14_A>`[src]

Bit 14 - Pin 14

`pub fn pin15(&self) -> R<bool, PIN15_A>`[src]

Bit 15 - Pin 15

`pub fn pin16(&self) -> R<bool, PIN16_A>`[src]

Bit 16 - Pin 16

`pub fn pin17(&self) -> R<bool, PIN17_A>`[src]

Bit 17 - Pin 17

`pub fn pin18(&self) -> R<bool, PIN18_A>`[src]

Bit 18 - Pin 18

`pub fn pin19(&self) -> R<bool, PIN19_A>`[src]

Bit 19 - Pin 19

`pub fn pin20(&self) -> R<bool, PIN20_A>`[src]

Bit 20 - Pin 20

`pub fn pin21(&self) -> R<bool, PIN21_A>`[src]

Bit 21 - Pin 21

`pub fn pin22(&self) -> R<bool, PIN22_A>`[src]

Bit 22 - Pin 22

`pub fn pin23(&self) -> R<bool, PIN23_A>`[src]

Bit 23 - Pin 23

`pub fn pin24(&self) -> R<bool, PIN24_A>`[src]

Bit 24 - Pin 24

`pub fn pin25(&self) -> R<bool, PIN25_A>`[src]

Bit 25 - Pin 25

`pub fn pin26(&self) -> R<bool, PIN26_A>`[src]

Bit 26 - Pin 26

`pub fn pin27(&self) -> R<bool, PIN27_A>`[src]

Bit 27 - Pin 27

`pub fn pin28(&self) -> R<bool, PIN28_A>`[src]

`pub fn pin3(&self) -> R<bool, PIN3_A>`[src]

Bit 3 - Pin 3

`pub fn pin4(&self) -> R<bool, PIN4_A>`[src]

Bit 4 - Pin 4

`pub fn pin5(&self) -> R<bool, PIN5_A>`[src]

Bit 5 - Pin 5

`pub fn pin6(&self) -> R<bool, PIN6_A>`[src]

Bit 6 - Pin 6

`pub fn pin7(&self) -> R<bool, PIN7_A>`[src]

Bit 7 - Pin 7

`pub fn pin8(&self) -> R<bool, PIN8_A>`[src]

Bit 8 - Pin 8

`pub fn pin9(&self) -> R<bool, PIN9_A>`[src]

Bit 9 - Pin 9

`pub fn pin10(&self) -> R<bool, PIN10_A>`[src]

Bit 10 - Pin 10

`pub fn pin11(&self) -> R<bool, PIN11_A>`[src]

Bit 11 - Pin 11

`pub fn pin12(&self) -> R<bool, PIN12_A>`[src]

Bit 12 - Pin 12

`pub fn pin13(&self) -> R<bool, PIN13_A>`[src]

Bit 13 - Pin 13

`pub fn pin14(&self) -> R<bool, PIN14_A>`[src]

Bit 14 - Pin 14

`pub fn pin15(&self) -> R<bool, PIN15_A>`[src]

Bit 15 - Pin 15

`pub fn pin16(&self) -> R<bool, PIN16_A>`[src]

Bit 16 - Pin 16

`pub fn pin17(&self) -> R<bool, PIN17_A>`[src]

Bit 17 - Pin 17

`pub fn pin18(&self) -> R<bool, PIN18_A>`[src]

Bit 18 - Pin 18

`pub fn pin19(&self) -> R<bool, PIN19_A>`[src]

Bit 19 - Pin 19

`pub fn pin20(&self) -> R<bool, PIN20_A>`[src]

Bit 20 - Pin 20

`pub fn pin21(&self) -> R<bool, PIN21_A>`[src]

Bit 21 - Pin 21

`pub fn pin22(&self) -> R<bool, PIN22_A>`[src]

Bit 22 - Pin 22

`pub fn pin23(&self) -> R<bool, PIN23_A>`[src]

Bit 23 - Pin 23

`pub fn pin24(&self) -> R<bool, PIN24_A>`[src]

Bit 24 - Pin 24

`pub fn pin25(&self) -> R<bool, PIN25_A>`[src]

Bit 25 - Pin 25

`pub fn pin26(&self) -> R<bool, PIN26_A>`[src]

Bit 26 - Pin 26

`pub fn pin27(&self) -> R<bool, PIN27_A>`[src]

Bit 27 - Pin 27

`pub fn pin28(&self) -> R<bool, PIN28_A>`[src]

Bit 28 - Pin 28

`pub fn pin29(&self) -> R<bool, PIN29_A>`[src]

Bit 29 - Pin 29

`pub fn pin30(&self) -> R<bool, PIN30_A>`[src]

Bit 30 - Pin 30

`pub fn is_high(&self) -> bool`[src]

Checks if the value of the field is HIGH

`impl R<u32, Reg<u32, _OUTCLR>>`[src]

`pub fn pin0(&self) -> R<bool, PIN0_A>`[src]

Bit 0 - Pin 0

`pub fn pin1(&self) -> R<bool, PIN1_A>`[src]

Bit 1 - Pin 1

`pub fn pin2(&self) -> R<bool, PIN2_A>`[src]

Bit 2 - Pin 2

`pub fn pin3(&self) -> R<bool, PIN3_A>`[src]

Bit 3 - Pin 3

`pub fn pin4(&self) -> R<bool, PIN4_A>`[src]

Bit 4 - Pin 4

`pub fn pin5(&self) -> R<bool, PIN5_A>`[src]

Bit 5 - Pin 5

`pub fn pin6(&self) -> R<bool, PIN6_A>`[src]

Bit 6 - Pin 6

`pub fn pin7(&self) -> R<bool, PIN7_A>`[src]

Bit 7 - Pin 7

`pub fn pin8(&self) -> R<bool, PIN8_A>`[src]

Bit 8 - Pin 8

`pub fn pin9(&self) -> R<bool, PIN9_A>`[src]

Bit 9 - Pin 9

`pub fn pin10(&self) -> R<bool, PIN10_A>`[src]

Bit 10 - Pin 10

`pub fn pin11(&self) -> R<bool, PIN11_A>`[src]

Bit 11 - Pin 11

`pub fn pin12(&self) -> R<bool, PIN12_A>`[src]

Bit 12 - Pin 12

`pub fn pin13(&self) -> R<bool, PIN13_A>`[src]

Bit 13 - Pin 13

`pub fn pin14(&self) -> R<bool, PIN14_A>`[src]

Bit 14 - Pin 14

`pub fn pin15(&self) -> R<bool, PIN15_A>`[src]

Bit 15 - Pin 15

`pub fn pin16(&self) -> R<bool, PIN16_A>`[src]

Bit 16 - Pin 16

`pub fn pin17(&self) -> R<bool, PIN17_A>`[src]

Bit 17 - Pin 17

`pub fn pin18(&self) -> R<bool, PIN18_A>`[src]

Bit 18 - Pin 18

`pub fn pin19(&self) -> R<bool, PIN19_A>`[src]

Bit 19 - Pin 19

`pub fn pin20(&self) -> R<bool, PIN20_A>`[src]

Bit 20 - Pin 20

`pub fn pin21(&self) -> R<bool, PIN21_A>`[src]

Bit 21 - Pin 21

`pub fn pin22(&self) -> R<bool, PIN22_A>`[src]

Bit 22 - Pin 22

`pub fn pin23(&self) -> R<bool, PIN23_A>`[src]

Bit 23 - Pin 23

`pub fn pin24(&self) -> R<bool, PIN24_A>`[src]

Bit 24 - Pin 24

`pub fn pin25(&self) -> R<bool, PIN25_A>`[src]

Bit 25 - Pin 25

`pub fn pin26(&self) -> R<bool, PIN26_A>`[src]

Bit 26 - Pin 26

`pub fn pin27(&self) -> R<bool, PIN27_A>`[src]

Bit 27 - Pin 27

`pub fn pin28(&self) -> R<bool, PIN28_A>`[src]

`pub fn pin3(&self) -> R<bool, PIN3_A>`[src]

Bit 3 - Pin 3

`pub fn pin4(&self) -> R<bool, PIN4_A>`[src]

Bit 4 - Pin 4

`pub fn pin5(&self) -> R<bool, PIN5_A>`[src]

Bit 5 - Pin 5

`pub fn pin6(&self) -> R<bool, PIN6_A>`[src]

Bit 6 - Pin 6

`pub fn pin7(&self) -> R<bool, PIN7_A>`[src]

Bit 7 - Pin 7

`pub fn pin8(&self) -> R<bool, PIN8_A>`[src]

Bit 8 - Pin 8

`pub fn pin9(&self) -> R<bool, PIN9_A>`[src]

Bit 9 - Pin 9

`pub fn pin10(&self) -> R<bool, PIN10_A>`[src]

Bit 10 - Pin 10

`pub fn pin11(&self) -> R<bool, PIN11_A>`[src]

Bit 11 - Pin 11

`pub fn pin12(&self) -> R<bool, PIN12_A>`[src]

Bit 12 - Pin 12

`pub fn pin13(&self) -> R<bool, PIN13_A>`[src]

Bit 13 - Pin 13

`pub fn pin14(&self) -> R<bool, PIN14_A>`[src]

Bit 14 - Pin 14

`pub fn pin15(&self) -> R<bool, PIN15_A>`[src]

Bit 15 - Pin 15

`pub fn pin16(&self) -> R<bool, PIN16_A>`[src]

Bit 16 - Pin 16

`pub fn pin17(&self) -> R<bool, PIN17_A>`[src]

Bit 17 - Pin 17

`pub fn pin18(&self) -> R<bool, PIN18_A>`[src]

Bit 18 - Pin 18

`pub fn pin19(&self) -> R<bool, PIN19_A>`[src]

Bit 19 - Pin 19

`pub fn pin20(&self) -> R<bool, PIN20_A>`[src]

Bit 20 - Pin 20

`pub fn pin21(&self) -> R<bool, PIN21_A>`[src]

Bit 21 - Pin 21

`pub fn pin22(&self) -> R<bool, PIN22_A>`[src]

Bit 22 - Pin 22

`pub fn pin23(&self) -> R<bool, PIN23_A>`[src]

Bit 23 - Pin 23

`pub fn pin24(&self) -> R<bool, PIN24_A>`[src]

Bit 24 - Pin 24

`pub fn pin25(&self) -> R<bool, PIN25_A>`[src]

Bit 25 - Pin 25

`pub fn pin26(&self) -> R<bool, PIN26_A>`[src]

Bit 26 - Pin 26

`pub fn pin27(&self) -> R<bool, PIN27_A>`[src]

Bit 27 - Pin 27

`pub fn pin28(&self) -> R<bool, PIN28_A>`[src]

Bit 28 - Pin 28

`pub fn pin29(&self) -> R<bool, PIN29_A>`[src]

Bit 29 - Pin 29

`pub fn pin30(&self) -> R<bool, PIN30_A>`[src]

Bit 30 - Pin 30

`pub fn is_output(&self) -> bool`[src]

Checks if the value of the field is OUTPUT

`impl R<u32, Reg<u32, _DIR>>`[src]

`pub fn pin0(&self) -> R<bool, PIN0_A>`[src]

Bit 0 - Pin 0

`pub fn pin1(&self) -> R<bool, PIN1_A>`[src]

Bit 1 - Pin 1

`pub fn pin2(&self) -> R<bool, PIN2_A>`[src]

Bit 2 - Pin 2

`pub fn pin3(&self) -> R<bool, PIN3_A>`[src]

Bit 3 - Pin 3

`pub fn pin4(&self) -> R<bool, PIN4_A>`[src]

Bit 4 - Pin 4

`pub fn pin5(&self) -> R<bool, PIN5_A>`[src]

Bit 5 - Pin 5

`pub fn pin6(&self) -> R<bool, PIN6_A>`[src]

Bit 6 - Pin 6

`pub fn pin7(&self) -> R<bool, PIN7_A>`[src]

Bit 7 - Pin 7

`pub fn pin8(&self) -> R<bool, PIN8_A>`[src]

Bit 8 - Pin 8

`pub fn pin9(&self) -> R<bool, PIN9_A>`[src]

Bit 9 - Pin 9

`pub fn pin10(&self) -> R<bool, PIN10_A>`[src]

Bit 10 - Pin 10

`pub fn pin11(&self) -> R<bool, PIN11_A>`[src]

Bit 11 - Pin 11

`pub fn pin12(&self) -> R<bool, PIN12_A>`[src]

Bit 12 - Pin 12

`pub fn pin13(&self) -> R<bool, PIN13_A>`[src]

Bit 13 - Pin 13

`pub fn pin14(&self) -> R<bool, PIN14_A>`[src]

Bit 14 - Pin 14

`pub fn pin15(&self) -> R<bool, PIN15_A>`[src]

Bit 15 - Pin 15

`pub fn pin16(&self) -> R<bool, PIN16_A>`[src]

Bit 16 - Pin 16

`pub fn pin17(&self) -> R<bool, PIN17_A>`[src]

Bit 17 - Pin 17

`pub fn pin18(&self) -> R<bool, PIN18_A>`[src]

Bit 18 - Pin 18

`pub fn pin19(&self) -> R<bool, PIN19_A>`[src]

Bit 19 - Pin 19

`pub fn pin20(&self) -> R<bool, PIN20_A>`[src]

Bit 20 - Pin 20

`pub fn pin21(&self) -> R<bool, PIN21_A>`[src]

Bit 21 - Pin 21

`pub fn pin22(&self) -> R<bool, PIN22_A>`[src]

Bit 22 - Pin 22

`pub fn pin23(&self) -> R<bool, PIN23_A>`[src]

Bit 23 - Pin 23

`pub fn pin24(&self) -> R<bool, PIN24_A>`[src]

Bit 24 - Pin 24

`pub fn pin25(&self) -> R<bool, PIN25_A>`[src]

Bit 25 - Pin 25

`pub fn pin26(&self) -> R<bool, PIN26_A>`[src]

Bit 26 - Pin 26

`pub fn pin27(&self) -> R<bool, PIN27_A>`[src]

Bit 27 - Pin 27

`pub fn pin28(&self) -> R<bool, PIN28_A>`[src]

`pub fn pin3(&self) -> R<bool, PIN3_A>`[src]

Bit 3 - Set as output pin 3

`pub fn pin4(&self) -> R<bool, PIN4_A>`[src]

Bit 4 - Set as output pin 4

`pub fn pin5(&self) -> R<bool, PIN5_A>`[src]

Bit 5 - Set as output pin 5

`pub fn pin6(&self) -> R<bool, PIN6_A>`[src]

Bit 6 - Set as output pin 6

`pub fn pin7(&self) -> R<bool, PIN7_A>`[src]

Bit 7 - Set as output pin 7

`pub fn pin8(&self) -> R<bool, PIN8_A>`[src]

Bit 8 - Set as output pin 8

`pub fn pin9(&self) -> R<bool, PIN9_A>`[src]

Bit 9 - Set as output pin 9

`pub fn pin10(&self) -> R<bool, PIN10_A>`[src]

Bit 10 - Set as output pin 10

`pub fn pin11(&self) -> R<bool, PIN11_A>`[src]

Bit 11 - Set as output pin 11

`pub fn pin12(&self) -> R<bool, PIN12_A>`[src]

Bit 12 - Set as output pin 12

`pub fn pin13(&self) -> R<bool, PIN13_A>`[src]

Bit 13 - Set as output pin 13

`pub fn pin14(&self) -> R<bool, PIN14_A>`[src]

Bit 14 - Set as output pin 14

`pub fn pin15(&self) -> R<bool, PIN15_A>`[src]

Bit 15 - Set as output pin 15

`pub fn pin16(&self) -> R<bool, PIN16_A>`[src]

Bit 16 - Set as output pin 16

`pub fn pin17(&self) -> R<bool, PIN17_A>`[src]

Bit 17 - Set as output pin 17

`pub fn pin18(&self) -> R<bool, PIN18_A>`[src]

Bit 18 - Set as output pin 18

`pub fn pin19(&self) -> R<bool, PIN19_A>`[src]

Bit 19 - Set as output pin 19

`pub fn pin20(&self) -> R<bool, PIN20_A>`[src]

Bit 20 - Set as output pin 20

`pub fn pin21(&self) -> R<bool, PIN21_A>`[src]

Bit 21 - Set as output pin 21

`pub fn pin22(&self) -> R<bool, PIN22_A>`[src]

Bit 22 - Set as output pin 22

`pub fn pin23(&self) -> R<bool, PIN23_A>`[src]

Bit 23 - Set as output pin 23

`pub fn pin24(&self) -> R<bool, PIN24_A>`[src]

Bit 24 - Set as output pin 24

`pub fn pin25(&self) -> R<bool, PIN25_A>`[src]

Bit 25 - Set as output pin 25

`pub fn pin26(&self) -> R<bool, PIN26_A>`[src]

Bit 26 - Set as output pin 26

`pub fn pin27(&self) -> R<bool, PIN27_A>`[src]

Bit 27 - Set as output pin 27

`pub fn pin28(&self) -> R<bool, PIN28_A>`[src]

Bit 28 - Set as output pin 28

`pub fn pin29(&self) -> R<bool, PIN29_A>`[src]

Bit 29 - Set as output pin 29

`pub fn pin30(&self) -> R<bool, PIN30_A>`[src]

Bit 30 - Set as output pin 30

`pub fn is_output(&self) -> bool`[src]

Checks if the value of the field is OUTPUT

`impl R<u32, Reg<u32, _DIRCLR>>`[src]

`pub fn pin0(&self) -> R<bool, PIN0_A>`[src]

Bit 0 - Set as input pin 0

`pub fn pin1(&self) -> R<bool, PIN1_A>`[src]

Bit 1 - Set as input pin 1

`pub fn pin2(&self) -> R<bool, PIN2_A>`[src]

Bit 2 - Set as input pin 2

`pub fn pin3(&self) -> R<bool, PIN3_A>`[src]

Bit 3 - Set as input pin 3

`pub fn pin4(&self) -> R<bool, PIN4_A>`[src]

Bit 4 - Set as input pin 4

`pub fn pin5(&self) -> R<bool, PIN5_A>`[src]

Bit 5 - Set as input pin 5

`pub fn pin6(&self) -> R<bool, PIN6_A>`[src]

Bit 6 - Set as input pin 6

`pub fn pin7(&self) -> R<bool, PIN7_A>`[src]

Bit 7 - Set as input pin 7

`pub fn pin8(&self) -> R<bool, PIN8_A>`[src]

Bit 8 - Set as input pin 8

`pub fn pin9(&self) -> R<bool, PIN9_A>`[src]

Bit 9 - Set as input pin 9

`pub fn pin10(&self) -> R<bool, PIN10_A>`[src]

Bit 10 - Set as input pin 10

`pub fn pin11(&self) -> R<bool, PIN11_A>`[src]

Bit 11 - Set as input pin 11

`pub fn pin12(&self) -> R<bool, PIN12_A>`[src]

Bit 12 - Set as input pin 12

`pub fn pin13(&self) -> R<bool, PIN13_A>`[src]

Bit 13 - Set as input pin 13

`pub fn pin14(&self) -> R<bool, PIN14_A>`[src]

Bit 14 - Set as input pin 14

`pub fn pin15(&self) -> R<bool, PIN15_A>`[src]

Bit 15 - Set as input pin 15

`pub fn pin16(&self) -> R<bool, PIN16_A>`[src]

Bit 16 - Set as input pin 16

`pub fn pin17(&self) -> R<bool, PIN17_A>`[src]

Bit 17 - Set as input pin 17

`pub fn pin18(&self) -> R<bool, PIN18_A>`[src]

Bit 18 - Set as input pin 18

`pub fn pin19(&self) -> R<bool, PIN19_A>`[src]

Bit 19 - Set as input pin 19

`pub fn pin20(&self) -> R<bool, PIN20_A>`[src]

Bit 20 - Set as input pin 20

`pub fn pin21(&self) -> R<bool, PIN21_A>`[src]

Bit 21 - Set as input pin 21

`pub fn pin22(&self) -> R<bool, PIN22_A>`[src]

Bit 22 - Set as input pin 22

`pub fn pin23(&self) -> R<bool, PIN23_A>`[src]

Bit 23 - Set as input pin 23

`pub fn pin24(&self) -> R<bool, PIN24_A>`[src]

Bit 24 - Set as input pin 24

`pub fn pin25(&self) -> R<bool, PIN25_A>`[src]

Bit 25 - Set as input pin 25

`pub fn pin26(&self) -> R<bool, PIN26_A>`[src]

Bit 26 - Set as input pin 26

`pub fn pin27(&self) -> R<bool, PIN27_A>`[src]

Bit 27 - Set as input pin 27

`pub fn pin28(&self) -> R<bool, PIN28_A>`[src]

`pub fn pin3(&self) -> R<bool, PIN3_A>`[src]

Bit 3 - Status on whether PIN3 has met criteria set in PIN_CNF3.SENSE register. Write '1' to clear.

`pub fn pin4(&self) -> R<bool, PIN4_A>`[src]

Bit 4 - Status on whether PIN4 has met criteria set in PIN_CNF4.SENSE register. Write '1' to clear.

`pub fn pin5(&self) -> R<bool, PIN5_A>`[src]

Bit 5 - Status on whether PIN5 has met criteria set in PIN_CNF5.SENSE register. Write '1' to clear.

`pub fn pin6(&self) -> R<bool, PIN6_A>`[src]

Bit 6 - Status on whether PIN6 has met criteria set in PIN_CNF6.SENSE register. Write '1' to clear.

`pub fn pin7(&self) -> R<bool, PIN7_A>`[src]

Bit 7 - Status on whether PIN7 has met criteria set in PIN_CNF7.SENSE register. Write '1' to clear.

`pub fn pin8(&self) -> R<bool, PIN8_A>`[src]

Bit 8 - Status on whether PIN8 has met criteria set in PIN_CNF8.SENSE register. Write '1' to clear.

`pub fn pin9(&self) -> R<bool, PIN9_A>`[src]

Bit 9 - Status on whether PIN9 has met criteria set in PIN_CNF9.SENSE register. Write '1' to clear.

`pub fn pin10(&self) -> R<bool, PIN10_A>`[src]

Bit 10 - Status on whether PIN10 has met criteria set in PIN_CNF10.SENSE register. Write '1' to clear.

`pub fn pin11(&self) -> R<bool, PIN11_A>`[src]

Bit 11 - Status on whether PIN11 has met criteria set in PIN_CNF11.SENSE register. Write '1' to clear.

`pub fn pin12(&self) -> R<bool, PIN12_A>`[src]

Bit 12 - Status on whether PIN12 has met criteria set in PIN_CNF12.SENSE register. Write '1' to clear.

`pub fn pin13(&self) -> R<bool, PIN13_A>`[src]

Bit 13 - Status on whether PIN13 has met criteria set in PIN_CNF13.SENSE register. Write '1' to clear.

`pub fn pin14(&self) -> R<bool, PIN14_A>`[src]

Bit 14 - Status on whether PIN14 has met criteria set in PIN_CNF14.SENSE register. Write '1' to clear.

`pub fn pin15(&self) -> R<bool, PIN15_A>`[src]

Bit 15 - Status on whether PIN15 has met criteria set in PIN_CNF15.SENSE register. Write '1' to clear.

`pub fn pin16(&self) -> R<bool, PIN16_A>`[src]

Bit 16 - Status on whether PIN16 has met criteria set in PIN_CNF16.SENSE register. Write '1' to clear.

`pub fn pin17(&self) -> R<bool, PIN17_A>`[src]

Bit 17 - Status on whether PIN17 has met criteria set in PIN_CNF17.SENSE register. Write '1' to clear.

`pub fn pin18(&self) -> R<bool, PIN18_A>`[src]

Bit 18 - Status on whether PIN18 has met criteria set in PIN_CNF18.SENSE register. Write '1' to clear.

`pub fn pin19(&self) -> R<bool, PIN19_A>`[src]

Bit 19 - Status on whether PIN19 has met criteria set in PIN_CNF19.SENSE register. Write '1' to clear.

`pub fn pin20(&self) -> R<bool, PIN20_A>`[src]

Bit 20 - Status on whether PIN20 has met criteria set in PIN_CNF20.SENSE register. Write '1' to clear.

`pub fn pin21(&self) -> R<bool, PIN21_A>`[src]

Bit 21 - Status on whether PIN21 has met criteria set in PIN_CNF21.SENSE register. Write '1' to clear.

`pub fn pin22(&self) -> R<bool, PIN22_A>`[src]

Bit 22 - Status on whether PIN22 has met criteria set in PIN_CNF22.SENSE register. Write '1' to clear.

`pub fn pin23(&self) -> R<bool, PIN23_A>`[src]

Bit 23 - Status on whether PIN23 has met criteria set in PIN_CNF23.SENSE register. Write '1' to clear.

`pub fn pin24(&self) -> R<bool, PIN24_A>`[src]

Bit 24 - Status on whether PIN24 has met criteria set in PIN_CNF24.SENSE register. Write '1' to clear.

`pub fn pin25(&self) -> R<bool, PIN25_A>`[src]

Bit 25 - Status on whether PIN25 has met criteria set in PIN_CNF25.SENSE register. Write '1' to clear.

`pub fn pin26(&self) -> R<bool, PIN26_A>`[src]

Bit 26 - Status on whether PIN26 has met criteria set in PIN_CNF26.SENSE register. Write '1' to clear.

`pub fn pin27(&self) -> R<bool, PIN27_A>`[src]

Bit 27 - Status on whether PIN27 has met criteria set in PIN_CNF27.SENSE register. Write '1' to clear.

`pub fn pin28(&self) -> R<bool, PIN28_A>`[src]

Bit 28 - Status on whether PIN28 has met criteria set in PIN_CNF28.SENSE register. Write '1' to clear.

`pub fn pin29(&self) -> R<bool, PIN29_A>`[src]

Bit 29 - Status on whether PIN29 has met criteria set in PIN_CNF29.SENSE register. Write '1' to clear.

`pub fn pin30(&self) -> R<bool, PIN30_A>`[src]

Bit 30 - Status on whether PIN30 has met criteria set in PIN_CNF30.SENSE register. Write '1' to clear.

`pub fn pin31(&self) -> R<bool, PIN31_A>`[src]

Bit 31 - Status on whether PIN31 has met criteria set in PIN_CNF31.SENSE register. Write '1' to clear.

`impl R<bool, DETECTMODE_A>`[src]

`pub fn variant(&self) -> DETECTMODE_A`[src]

Get enumerated values variant

`pub fn is_default(&self) -> bool`[src]

Checks if the value of the field is DEFAULT

`pub fn is_ldetect(&self) -> bool`[src]

Checks if the value of the field is LDETECT

Checks if the value of the field is DISABLED

`pub fn is_pulldown(&self) -> bool`[src]

Checks if the value of the field is PULLDOWN

`pub fn is_pullup(&self) -> bool`[src]

Checks if the value of the field is PULLUP

`impl R<u8, DRIVE_A>`[src]

`pub fn variant(&self) -> DRIVE_A`[src]

Get enumerated values variant

`pub fn is_s0s1(&self) -> bool`[src]

Checks if the value of the field is S0S1

`pub fn is_h0s1(&self) -> bool`[src]

Checks if the value of the field is H0S1

`pub fn is_s0h1(&self) -> bool`[src]

Checks if the value of the field is S0H1

`pub fn is_h0h1(&self) -> bool`[src]

Checks if the value of the field is H0H1

`pub fn is_d0s1(&self) -> bool`[src]

Checks if the value of the field is D0S1

`pub fn is_d0h1(&self) -> bool`[src]

Checks if the value of the field is D0H1

`pub fn is_s0d1(&self) -> bool`[src]

Checks if the value of the field is S0D1

`pub fn is_h0d1(&self) -> bool`[src]

Checks if the value of the field is H0D1

`impl R<u8, SENSE_A>`[src]

`pub fn variant(&self) -> Variant<u8, SENSE_A>`[src]

Get enumerated values variant

`pub fn is_disabled(&self) -> bool`[src]

Checks if the value of the field is DISABLED

`pub fn is_high(&self) -> bool`[src]

Checks if the value of the field is HIGH

`pub fn is_low(&self) -> bool`[src]

Checks if the value of the field is LOW

`impl R<u32, Reg<u32, _PIN_CNF>>`[src]

`pub fn dir(&self) -> R<bool, DIR_A>`[src]

Bit 0 - Pin direction. Same physical register as DIR register

`pub fn input(&self) -> R<bool, INPUT_A>`[src]

Bit 1 - Connect or disconnect input buffer

`pub fn pull(&self) -> R<u8, PULL_A>`[src]

Bits 2:3 - Pull configuration

`pub fn drive(&self) -> R<u8, DRIVE_A>`[src]

Bits 8:10 - Drive configuration

`pub fn sense(&self) -> R<u8, SENSE_A>`[src]

Bits 16:17 - Pin sensing mechanism

Trait Implementations

`impl<U, T, FI> PartialEq<FI> for R<U, T> where FI: Copy + Into, U: PartialEq,` [src]

`fn eq(&self, other: &FI) -> bool`[src]

`#[must_use]fn ne(&self, other: &Rhs) -> bool`1.0.0[src]

Auto Trait Implementations

`impl<U, T> Send for R<U, T> where T: Send, U: Send,`

`impl<U, T> Sync for R<U, T> where T: Sync, U: Sync,`

`impl<U, T> Unpin for R<U, T> where T: Unpin, U: Unpin,`

Blanket Implementations

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`fn from(t: T) -> T`[src]

`impl<T, U> Into for T where U: From<T>,` [src]

`fn into(self) -> U`[src]

`impl<T> Same<T> for T`

`type Output = T`

Should always be Self

`impl<T, U> TryFrom for T where U: Into<T>,` [src]

`type Error = Infallible`

The type returned in the event of a conversion error.

`fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>`[src]

`impl<T, U> TryInto for T where U: TryFrom<T>,` [src]

`type Error = >::Error`

The type returned in the event of a conversion error.

[−][src]Struct nrf52832_hal::pac::generic::R

Implementations

impl<U, T> R<U, T> where U: Copy, [src]

pub fn bits(&self) -> U[src]

impl<FI> R<bool, FI>[src]

pub fn bit(&self) -> bool[src]

pub fn bit_is_clear(&self) -> bool[src]

pub fn bit_is_set(&self) -> bool[src]

impl R<u32, PART_A>[src]

pub fn variant(&self) -> Variant<u32, PART_A>[src]

pub fn is_n52832(&self) -> bool[src]

pub fn is_unspecified(&self) -> bool[src]

impl R<u32, Reg<u32, _PART>>[src]

pub fn part(&self) -> R<u32, PART_A>[src]

impl R<u32, VARIANT_A>[src]

pub fn variant(&self) -> Variant<u32, VARIANT_A>[src]

pub fn is_aaaa(&self) -> bool[src]

pub fn is_aaab(&self) -> bool[src]

pub fn is_aaba(&self) -> bool[src]

pub fn is_aabb(&self) -> bool[src]

pub fn is_aab0(&self) -> bool[src]

pub fn is_aae0(&self) -> bool[src]

pub fn is_unspecified(&self) -> bool[src]

impl R<u32, Reg<u32, _VARIANT>>[src]

pub fn variant(&self) -> R<u32, VARIANT_A>[src]

impl R<u32, PACKAGE_A>[src]

pub fn variant(&self) -> Variant<u32, PACKAGE_A>[src]

pub fn is_qf(&self) -> bool[src]

pub fn is_ch(&self) -> bool[src]

pub fn is_ci(&self) -> bool[src]

pub fn is_ck(&self) -> bool[src]

pub fn is_unspecified(&self) -> bool[src]

impl R<u32, Reg<u32, _PACKAGE>>[src]

pub fn package(&self) -> R<u32, PACKAGE_A>[src]

impl R<u32, RAM_A>[src]

pub fn variant(&self) -> Variant<u32, RAM_A>[src]

pub fn is_k16(&self) -> bool[src]

pub fn is_k32(&self) -> bool[src]

pub fn is_k64(&self) -> bool[src]

pub fn is_unspecified(&self) -> bool[src]

impl R<u32, Reg<u32, _RAM>>[src]

pub fn ram(&self) -> R<u32, RAM_A>[src]

impl R<u32, FLASH_A>[src]

pub fn variant(&self) -> Variant<u32, FLASH_A>[src]

pub fn is_k128(&self) -> bool[src]

pub fn is_k256(&self) -> bool[src]

pub fn is_k512(&self) -> bool[src]

pub fn is_unspecified(&self) -> bool[src]

impl R<u32, Reg<u32, _FLASH>>[src]

pub fn flash(&self) -> R<u32, FLASH_A>[src]

impl R<u32, Reg<u32, _A0>>[src]

pub fn a(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _A1>>[src]

pub fn a(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _A2>>[src]

pub fn a(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _A3>>[src]

pub fn a(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _A4>>[src]

pub fn a(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _A5>>[src]

pub fn a(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _B0>>[src]

pub fn b(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _B1>>[src]

pub fn b(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _B2>>[src]

pub fn b(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _B3>>[src]

pub fn b(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _B4>>[src]

pub fn b(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _B5>>[src]

pub fn b(&self) -> R<u16, u16>[src]

impl R<u32, Reg<u32, _T0>>[src]

pub fn t(&self) -> R<u8, u8>[src]

impl R<u32, Reg<u32, _T1>>[src]

pub fn t(&self) -> R<u8, u8>[src]

impl R<u32, Reg<u32, _T2>>[src]

pub fn t(&self) -> R<u8, u8>[src]

`impl<U, T> R<U, T> where U: Copy,` [src]

`pub fn bits(&self) -> U`[src]

`impl<FI> R<bool, FI>`[src]

`pub fn bit(&self) -> bool`[src]

`pub fn bit_is_clear(&self) -> bool`[src]

`pub fn bit_is_set(&self) -> bool`[src]

`impl R<u32, PART_A>`[src]

`pub fn variant(&self) -> Variant<u32, PART_A>`[src]

`pub fn is_n52832(&self) -> bool`[src]

`pub fn is_unspecified(&self) -> bool`[src]

`impl R<u32, Reg<u32, _PART>>`[src]

`pub fn part(&self) -> R<u32, PART_A>`[src]

`impl R<u32, VARIANT_A>`[src]

`pub fn variant(&self) -> Variant<u32, VARIANT_A>`[src]

`pub fn is_aaaa(&self) -> bool`[src]

`pub fn is_aaab(&self) -> bool`[src]

`pub fn is_aaba(&self) -> bool`[src]

`pub fn is_aabb(&self) -> bool`[src]

`pub fn is_aab0(&self) -> bool`[src]

`pub fn is_aae0(&self) -> bool`[src]

`pub fn is_unspecified(&self) -> bool`[src]

`impl R<u32, Reg<u32, _VARIANT>>`[src]

`pub fn variant(&self) -> R<u32, VARIANT_A>`[src]

`impl R<u32, PACKAGE_A>`[src]

`pub fn variant(&self) -> Variant<u32, PACKAGE_A>`[src]

`pub fn is_qf(&self) -> bool`[src]

`pub fn is_ch(&self) -> bool`[src]

`pub fn is_ci(&self) -> bool`[src]

`pub fn is_ck(&self) -> bool`[src]

`pub fn is_unspecified(&self) -> bool`[src]

`impl R<u32, Reg<u32, _PACKAGE>>`[src]

`pub fn package(&self) -> R<u32, PACKAGE_A>`[src]

`impl R<u32, RAM_A>`[src]

`pub fn variant(&self) -> Variant<u32, RAM_A>`[src]

`pub fn is_k16(&self) -> bool`[src]

`pub fn is_k32(&self) -> bool`[src]

`pub fn is_k64(&self) -> bool`[src]

`pub fn is_unspecified(&self) -> bool`[src]

`impl R<u32, Reg<u32, _RAM>>`[src]

`pub fn ram(&self) -> R<u32, RAM_A>`[src]

`impl R<u32, FLASH_A>`[src]

`pub fn variant(&self) -> Variant<u32, FLASH_A>`[src]

`pub fn is_k128(&self) -> bool`[src]

`pub fn is_k256(&self) -> bool`[src]

`pub fn is_k512(&self) -> bool`[src]

`pub fn is_unspecified(&self) -> bool`[src]

`impl R<u32, Reg<u32, _FLASH>>`[src]

`pub fn flash(&self) -> R<u32, FLASH_A>`[src]

`impl R<u32, Reg<u32, _A0>>`[src]

`pub fn a(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _A1>>`[src]

`pub fn a(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _A2>>`[src]

`pub fn a(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _A3>>`[src]

`pub fn a(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _A4>>`[src]

`pub fn a(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _A5>>`[src]

`pub fn a(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _B0>>`[src]

`pub fn b(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _B1>>`[src]

`pub fn b(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _B2>>`[src]

`pub fn b(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _B3>>`[src]

`pub fn b(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _B4>>`[src]

`pub fn b(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _B5>>`[src]

`pub fn b(&self) -> R<u16, u16>`[src]

`impl R<u32, Reg<u32, _T0>>`[src]

`pub fn t(&self) -> R<u8, u8>`[src]

`impl R<u32, Reg<u32, _T1>>`[src]

`pub fn t(&self) -> R<u8, u8>`[src]

`impl R<u32, Reg<u32, _T2>>`[src]

`pub fn t(&self) -> R<u8, u8>`[src]

`impl R<u32, Reg<u32, _T3>>`[src]

`pub fn t(&self) -> R<u8, u8>`[src]