Enum nrf52811_pac::ppi::chenclr::CH31_AW [−][src]
pub enum CH31_AW { CLEAR, }
Expand description
Channel 31 enable clear register. Writing ‘0’ has no effect
Value on reset: 0
Variants
1: Write: disable channel
pub enum CH31_AW { CLEAR, }
Channel 31 enable clear register. Writing ‘0’ has no effect
Value on reset: 0
1: Write: disable channel