pub struct Config(/* private fields */);Expand description
§CONFIG register
Address = 0x00
§Fields
§mask_rx_dr | bit 6
Mask/unmask interrupt caused by RX_DR.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
§mask_tx_ds | bit 5
Mask/unmask interrupt caused by TX_DS.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
§mask_max_rt | bit 4
Mask/unmask interrupt caused by MAX_RT.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
§en_crc | bit 3
Enable/disable CRC. Default value: 1 (enabled)
§crco | bit 2
CRC encoding scheme.
0: 1 byte
1: 2 byte
§pwr_up | bit 1
Power down/up.
0: Power down
1: Power up
§prim_rx | bit 0
Set primary TX/RX.
0: primary TX
1: primary RX
§Example
use nrf24l01_commands::registers;
// Default value
let reg = registers::Config::new();
assert_eq!(reg.into_bits(), 0b0000_1000);
// Write fields
let reg = registers::Config::new()
.with_mask_rx_dr(true)
.with_mask_tx_ds(false)
.with_mask_max_rt(false)
.with_en_crc(false)
.with_crco(true)
.with_pwr_up(true)
.with_prim_rx(false);
assert_eq!(reg.into_bits(), 0b0100_0110);Implementations§
source§impl Config
impl Config
sourcepub const fn mask_rx_dr(&self) -> bool
pub const fn mask_rx_dr(&self) -> bool
Mask/unmask interrupt caused by RX_DR.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 6..7
sourcepub const fn with_mask_rx_dr_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_mask_rx_dr_checked(self, value: bool) -> Result<Self, ()>
Mask/unmask interrupt caused by RX_DR.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 6..7
sourcepub const fn with_mask_rx_dr(self, value: bool) -> Self
pub const fn with_mask_rx_dr(self, value: bool) -> Self
Mask/unmask interrupt caused by RX_DR.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 6..7
sourcepub fn set_mask_rx_dr(&mut self, value: bool)
pub fn set_mask_rx_dr(&mut self, value: bool)
Mask/unmask interrupt caused by RX_DR.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 6..7
sourcepub fn set_mask_rx_dr_checked(&mut self, value: bool) -> Result<(), ()>
pub fn set_mask_rx_dr_checked(&mut self, value: bool) -> Result<(), ()>
Mask/unmask interrupt caused by RX_DR.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 6..7
sourcepub const fn mask_tx_ds(&self) -> bool
pub const fn mask_tx_ds(&self) -> bool
Mask/unmask interrupt caused by TX_DS.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 5..6
sourcepub const fn with_mask_tx_ds_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_mask_tx_ds_checked(self, value: bool) -> Result<Self, ()>
Mask/unmask interrupt caused by TX_DS.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 5..6
sourcepub const fn with_mask_tx_ds(self, value: bool) -> Self
pub const fn with_mask_tx_ds(self, value: bool) -> Self
Mask/unmask interrupt caused by TX_DS.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 5..6
sourcepub fn set_mask_tx_ds(&mut self, value: bool)
pub fn set_mask_tx_ds(&mut self, value: bool)
Mask/unmask interrupt caused by TX_DS.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 5..6
sourcepub fn set_mask_tx_ds_checked(&mut self, value: bool) -> Result<(), ()>
pub fn set_mask_tx_ds_checked(&mut self, value: bool) -> Result<(), ()>
Mask/unmask interrupt caused by TX_DS.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 5..6
sourcepub const fn mask_max_rt(&self) -> bool
pub const fn mask_max_rt(&self) -> bool
Mask/unmask interrupt caused by MAX_RT.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 4..5
sourcepub const fn with_mask_max_rt_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_mask_max_rt_checked(self, value: bool) -> Result<Self, ()>
Mask/unmask interrupt caused by MAX_RT.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 4..5
sourcepub const fn with_mask_max_rt(self, value: bool) -> Self
pub const fn with_mask_max_rt(self, value: bool) -> Self
Mask/unmask interrupt caused by MAX_RT.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 4..5
sourcepub fn set_mask_max_rt(&mut self, value: bool)
pub fn set_mask_max_rt(&mut self, value: bool)
Mask/unmask interrupt caused by MAX_RT.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 4..5
sourcepub fn set_mask_max_rt_checked(&mut self, value: bool) -> Result<(), ()>
pub fn set_mask_max_rt_checked(&mut self, value: bool) -> Result<(), ()>
Mask/unmask interrupt caused by MAX_RT.
0: unmasked, interrupt reflected on IRQ
1: masked, interrupt not reflected on IRQ
Bits: 4..5
sourcepub const fn with_en_crc_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_en_crc_checked(self, value: bool) -> Result<Self, ()>
Enable/disable CRC. Default value: 1 (enabled)
Bits: 3..4
sourcepub const fn with_en_crc(self, value: bool) -> Self
pub const fn with_en_crc(self, value: bool) -> Self
Enable/disable CRC. Default value: 1 (enabled)
Bits: 3..4
sourcepub fn set_en_crc(&mut self, value: bool)
pub fn set_en_crc(&mut self, value: bool)
Enable/disable CRC. Default value: 1 (enabled)
Bits: 3..4
sourcepub fn set_en_crc_checked(&mut self, value: bool) -> Result<(), ()>
pub fn set_en_crc_checked(&mut self, value: bool) -> Result<(), ()>
Enable/disable CRC. Default value: 1 (enabled)
Bits: 3..4
sourcepub const fn with_crco_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_crco_checked(self, value: bool) -> Result<Self, ()>
CRC encoding scheme.
0: 1 byte
1: 2 byte
Bits: 2..3
sourcepub const fn with_crco(self, value: bool) -> Self
pub const fn with_crco(self, value: bool) -> Self
CRC encoding scheme.
0: 1 byte
1: 2 byte
Bits: 2..3
sourcepub fn set_crco_checked(&mut self, value: bool) -> Result<(), ()>
pub fn set_crco_checked(&mut self, value: bool) -> Result<(), ()>
CRC encoding scheme.
0: 1 byte
1: 2 byte
Bits: 2..3
sourcepub const fn with_pwr_up_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_pwr_up_checked(self, value: bool) -> Result<Self, ()>
Power down/up.
0: Power down
1: Power up
Bits: 1..2
sourcepub const fn with_pwr_up(self, value: bool) -> Self
pub const fn with_pwr_up(self, value: bool) -> Self
Power down/up.
0: Power down
1: Power up
Bits: 1..2
sourcepub fn set_pwr_up(&mut self, value: bool)
pub fn set_pwr_up(&mut self, value: bool)
Power down/up.
0: Power down
1: Power up
Bits: 1..2
sourcepub fn set_pwr_up_checked(&mut self, value: bool) -> Result<(), ()>
pub fn set_pwr_up_checked(&mut self, value: bool) -> Result<(), ()>
Power down/up.
0: Power down
1: Power up
Bits: 1..2
sourcepub const fn with_prim_rx_checked(self, value: bool) -> Result<Self, ()>
pub const fn with_prim_rx_checked(self, value: bool) -> Result<Self, ()>
Set primary TX/RX.
0: primary TX
1: primary RX
Bits: 0..1
sourcepub const fn with_prim_rx(self, value: bool) -> Self
pub const fn with_prim_rx(self, value: bool) -> Self
Set primary TX/RX.
0: primary TX
1: primary RX
Bits: 0..1
sourcepub fn set_prim_rx(&mut self, value: bool)
pub fn set_prim_rx(&mut self, value: bool)
Set primary TX/RX.
0: primary TX
1: primary RX
Bits: 0..1
Trait Implementations§
impl Copy for Config
Auto Trait Implementations§
impl Freeze for Config
impl RefUnwindSafe for Config
impl Send for Config
impl Sync for Config
impl Unpin for Config
impl UnwindSafe for Config
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit)