Struct ControlFlowGraph 

pub struct ControlFlowGraph {
    pub graph: DiGraph<BasicBlock, EdgeType>,
    pub loops: Vec<LoopInfo>,
    pub dominators: Option<Dominators<NodeIndex>>,
    /* private fields */
}

Control Flow Graph with proper basic block analysis

Fields

graph: DiGraph<BasicBlock, EdgeType>

loops: Vec<LoopInfo>

Detected loops in the CFG

dominators: Option<Dominators<NodeIndex>>

Dominator tree information

Implementations

impl ControlFlowGraph

pub fn new() -> Self

pub fn build_cfg(analysis: &BinaryAnalysis) -> Result<Self, String>

Build CFG from binary analysis with Capstone disassembly

pub fn init_capstone(&self, architecture: &str) -> Result<Capstone, String>

pub fn build_basic_blocks_from_symbols( &mut self, analysis: &BinaryAnalysis, _cs: &Capstone, ) -> Result<(), String>

pub fn build_basic_blocks_from_binary( &mut self, analysis: &BinaryAnalysis, cs: &Capstone, binary_data: &[u8], ) -> Result<(), String>

pub fn extract_code_sections_by_format( &self, analysis: &BinaryAnalysis, binary_data: &[u8], entry_point: u64, ) -> Result<Vec<CodeSection>, String>

pub fn extract_elf_entry_point(&self, binary_data: &[u8]) -> Result<u64, String>

pub fn extract_elf_code_sections( &self, binary_data: &[u8], ) -> Result<Vec<CodeSection>, String>

pub fn get_elf_string_table( &self, binary_data: &[u8], shoff: u64, shentsize: u16, shstrndx: u16, is_64bit: bool, is_little_endian: bool, ) -> Option<Vec<u8>>

pub fn get_string_from_table( &self, string_table: &[u8], offset: usize, ) -> Option<String>

pub fn extract_pe_entry_point(&self, binary_data: &[u8]) -> Result<u64, String>

pub fn extract_pe_code_sections( &self, binary_data: &[u8], ) -> Result<Vec<CodeSection>, String>

pub fn extract_intel_hex_entry_point( &self, binary_data: &[u8], ) -> Result<u64, String>

pub fn extract_intel_hex_code_sections( &self, binary_data: &[u8], entry_point: u64, ) -> Result<Vec<CodeSection>, String>

pub fn extract_srec_entry_point( &self, binary_data: &[u8], ) -> Result<u64, String>

pub fn extract_srec_code_sections( &self, binary_data: &[u8], entry_point: u64, ) -> Result<Vec<CodeSection>, String>

pub fn extract_arm_cortex_m_entry_point( &self, binary_data: &[u8], ) -> Result<u64, String>

pub fn extract_raw_firmware_entry_point( &self, analysis: &BinaryAnalysis, _binary_data: &[u8], ) -> Result<u64, String>

pub fn extract_raw_firmware_code_sections( &self, binary_data: &[u8], entry_point: u64, ) -> Result<Vec<CodeSection>, String>

pub fn disassemble_code_section( &mut self, cs: &Capstone, binary_data: &[u8], section: &CodeSection, entry_point: u64, ) -> Result<(), String>

pub fn build_basic_blocks_from_instructions( &mut self, instructions: &Instructions<'_>, entry_point: u64, ) -> Result<(), String>

pub fn get_block_end_address(&self, block: &BasicBlock) -> u64

pub fn build_control_flow_edges(&mut self) -> Result<(), String>

pub fn find_block_at_address(&self, address: u64) -> Option<NodeIndex>

pub fn is_function_entry_heuristic( &self, addr: u64, instructions: &[Instruction], ) -> bool

pub fn is_block_boundary_instruction(&self, insn: &Insn<'_>) -> bool

pub fn is_branch_instruction(&self, insn: &Insn<'_>) -> bool

pub fn is_call_instruction(&self, insn: &Insn<'_>) -> bool

pub fn is_return_instruction(&self, insn: &Insn<'_>) -> bool

pub fn get_branch_target(&self, insn: &Insn<'_>) -> Option<u64>

pub fn is_conditional_block(&self, instructions: &[Instruction]) -> bool

pub fn is_call_block(&self, instructions: &[Instruction]) -> bool

pub fn extract_condition(&self, instructions: &[Instruction]) -> String

pub fn extract_call_target(&self, instructions: &[Instruction]) -> String

pub fn create_placeholder_instructions( &self, start_addr: u64, function_name: &str, ) -> Vec<Instruction>

pub fn detect_loops(&mut self)

pub fn build_dominators(&mut self)

pub fn get_block_address(&self, block: &BasicBlock) -> Option<u64>

pub fn get_block_address_by_node(&self, node_idx: NodeIndex) -> Option<u64>

pub fn analyze_call_graph(&self, analysis: &BinaryAnalysis) -> CallGraphAnalysis

Analyze call graph relationships

pub fn get_loop_headers(&self) -> Vec<u64>

Get basic blocks that are loop headers

pub fn is_in_loop(&self, address: u64) -> bool

Check if an address is in a loop

pub fn get_dominators(&self, node: NodeIndex) -> Option<Vec<NodeIndex>>

Get dominator information for a block

Trait Implementations

impl Debug for ControlFlowGraph

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.