Struct msp430fr6972::generic::Reg [−][src]
#[repr(transparent)]pub struct Reg<REG: RegisterSpec> { /* fields omitted */ }
This structure provides volatile access to registers.
Implementations
impl<REG: RegisterSpec> Reg<REG>
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impl<REG: RegisterSpec> Reg<REG>
[src]impl<REG: Readable> Reg<REG>
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impl<REG: Readable> Reg<REG>
[src]pub fn read(&self) -> REG::Reader
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pub fn read(&self) -> REG::Reader
[src]Reads the contents of a Readable
register.
You can read the raw contents of a register by using bits
:
let bits = periph.reg.read().bits();
or get the content of a particular field of a register:
let reader = periph.reg.read(); let bits = reader.field1().bits(); let flag = reader.field2().bit_is_set();
impl<REG: Resettable + Writable> Reg<REG>
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impl<REG: Resettable + Writable> Reg<REG>
[src]pub fn reset(&self)
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pub fn reset(&self)
[src]Writes the reset value to Writable
register.
Resets the register to its initial state.
pub fn write<F>(&self, f: F) where
F: FnOnce(&mut REG::Writer) -> &mut W<REG>,
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pub fn write<F>(&self, f: F) where
F: FnOnce(&mut REG::Writer) -> &mut W<REG>,
[src]Writes bits to a Writable
register.
You can write raw bits into a register:
periph.reg.write(|w| unsafe { w.bits(rawbits) });
or write only the fields you need:
periph.reg.write(|w| w .field1().bits(newfield1bits) .field2().set_bit() .field3().variant(VARIANT) );
In the latter case, other fields will be set to their reset value.
impl<REG: Writable> Reg<REG> where
REG::Ux: Default,
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impl<REG: Writable> Reg<REG> where
REG::Ux: Default,
[src]pub unsafe fn write_with_zero<F>(&self, f: F) where
F: FnOnce(&mut REG::Writer) -> &mut W<REG>,
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pub unsafe fn write_with_zero<F>(&self, f: F) where
F: FnOnce(&mut REG::Writer) -> &mut W<REG>,
[src]Writes 0 to a Writable
register.
Similar to write
, but unused bits will contain 0.
impl<REG: Readable + Writable> Reg<REG>
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impl<REG: Readable + Writable> Reg<REG>
[src]pub fn modify<F>(&self, f: F) where
F: FnOnce(®::Reader, &'w mut REG::Writer) -> &'w mut W<REG>,
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pub fn modify<F>(&self, f: F) where
F: FnOnce(®::Reader, &'w mut REG::Writer) -> &'w mut W<REG>,
[src]Modifies the contents of the register by reading and then writing it.
E.g. to do a read-modify-write sequence to change parts of a register:
periph.reg.modify(|r, w| unsafe { w.bits( r.bits() | 3 ) });
or
periph.reg.modify(|_, w| w .field1().bits(newfield1bits) .field2().set_bit() .field3().variant(VARIANT) );
Other fields will have the value they had before the call to modify
.
Trait Implementations
Auto Trait Implementations
impl<REG> !Sync for Reg<REG>
impl<REG> Unpin for Reg<REG> where
REG: Unpin,
<REG as RegisterSpec>::Ux: Unpin,
REG: Unpin,
<REG as RegisterSpec>::Ux: Unpin,