PCIE_END_CONF_TypeDef

Struct PCIE_END_CONF_TypeDef 

Source
#[repr(C)]
pub struct PCIE_END_CONF_TypeDef {
Show 45 fields pub VID_DEVID: u32, pub CFG_PRMSCR: u32, pub CLASS_CODE: u32, pub BIST_HEADER: u32, pub BAR0: u32, pub BAR1: u32, pub BAR2: u32, pub BAR3: u32, pub BAR4: u32, pub BAR5: u32, pub RESERVED1: u32, pub SUBSYSTEM_ID: u32, pub EXPAN_ROM: u32, pub CAPAB_POINTER: u32, pub EXPAN_ROM_BASE: u32, pub INT_LINE_PIN: u32, pub RESERVED2: [u32; 16], pub CAPAB_LIST: u32, pub DEVICE_CAPAB: u32, pub DEVICE_CTRL_STAT: u32, pub LINK_CAPAB: u32, pub LINK_CTRL_STAT: u32, pub SLOT_CAPAB: u32, pub SLOT_CTRL_STAT: u32, pub ROOT_CTRL: u32, pub ROOT_STAT: u32, pub DEVICE2_CAPAB: u32, pub DEVICE2_CTRL_STAT: u32, pub LINK2_CAPAB: u32, pub LINK2_CTRL_STAT: u32, pub SLOT2_CAPAB: u32, pub SLOT2_CTRL_STAT: u32, pub RESERVED3: [u32; 5], pub MSI_X_CAPAB_CTRL: u32, pub MSI_X_TABLE: u32, pub MSI_X_PBA: u32, pub RESERVED4: u32, pub MSI_CAPAB_CTRL: u32, pub MSI_LOWER_ADDRESS: u32, pub MSI_UPPER_ADDRESS: u32, pub RESERVED5: u32, pub MSI_DATA: u32, pub RESERVED6: u32, pub POWER_MNGM_CAPAB: u32, pub POWER_CTRL_STAT: u32,
}

Fields§

§VID_DEVID: u32

Information register: vendor_id & device_id bits [15:0] vendor_id bits [31:16] device_id

§CFG_PRMSCR: u32

PCI Express Control & Status Register: cfg_prmscr

§CLASS_CODE: u32

Information register: class_code

§BIST_HEADER: u32

BIST, Header, master latency timer, cache : BIST_HEADER

§BAR0: u32

Bridge Configuration Register: bar0

§BAR1: u32

Bridge Configuration Register: bar1

§BAR2: u32

Bridge Configuration Register: bar2

§BAR3: u32

Bridge Configuration Register: bar3

§BAR4: u32

Bridge Configuration Register: bar4

§BAR5: u32

Bridge Configuration Register: bar5

§RESERVED1: u32§SUBSYSTEM_ID: u32

Information register: subsystem_id

§EXPAN_ROM: u32

Expansion ROM Base Address Register: expansion_rom

§CAPAB_POINTER: u32

Capability pointer register: capab_pointer

§EXPAN_ROM_BASE: u32

Expansion ROM Base Address register: expansion_rom_base

§INT_LINE_PIN: u32

Interrupt Line and Pin register: int_line_pin

§RESERVED2: [u32; 16]§CAPAB_LIST: u32

PCIe Capability list register: CAPAB_LIST

§DEVICE_CAPAB: u32

Device Capabilities register: device_capab

§DEVICE_CTRL_STAT: u32

Device Control and status register: device_ctrl_stat

§LINK_CAPAB: u32

Link Capabilities register: link_capab

§LINK_CTRL_STAT: u32

Link Control and status register: link_ctrl_stat

§SLOT_CAPAB: u32

Slot capabilities register: slot_capab

§SLOT_CTRL_STAT: u32

Slot Control and status register: slot_ctrl_stat

§ROOT_CTRL: u32

Root control register: root_ctrl

§ROOT_STAT: u32

Root status register: root_stat

§DEVICE2_CAPAB: u32

Device 2 Capabilities register: device2_capab

§DEVICE2_CTRL_STAT: u32

Device 2 Control and status register: device2_ctrl_stat

§LINK2_CAPAB: u32

Link Capabilities 2 register: link2_capab

§LINK2_CTRL_STAT: u32

Link Control and status 2register: link2_ctrl_stat

§SLOT2_CAPAB: u32

Slot 2 capabilities register: slot2_capab

§SLOT2_CTRL_STAT: u32

Slot 2 Control and status register: slot2_ctrl_stat

§RESERVED3: [u32; 5]§MSI_X_CAPAB_CTRL: u32

MSI-X capability and control register: msi_x_capab_ctrl

§MSI_X_TABLE: u32

MSI-X table register: msi_x_table

§MSI_X_PBA: u32

MSI-X PBA register: msi_x_pba

§RESERVED4: u32§MSI_CAPAB_CTRL: u32

MSI capability id and message control register: msi_capab_ctrl

§MSI_LOWER_ADDRESS: u32

MSI message lower address register: msi_lower address

§MSI_UPPER_ADDRESS: u32

MSI message upper address register: msi_upper address

§RESERVED5: u32§MSI_DATA: u32

MSI message data register: msi_data

§RESERVED6: u32§POWER_MNGM_CAPAB: u32

Power Management Capability register: power_mngm_capab

§POWER_CTRL_STAT: u32

Power Management control and status register: power_ctrl_stat

Trait Implementations§

Source§

impl Clone for PCIE_END_CONF_TypeDef

Source§

fn clone(&self) -> PCIE_END_CONF_TypeDef

Returns a duplicate of the value. Read more
1.0.0 · Source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more
Source§

impl Debug for PCIE_END_CONF_TypeDef

Source§

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
Source§

impl Copy for PCIE_END_CONF_TypeDef

Auto Trait Implementations§

Blanket Implementations§

Source§

impl<T> Any for T
where T: 'static + ?Sized,

Source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
Source§

impl<T> Borrow<T> for T
where T: ?Sized,

Source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
Source§

impl<T> BorrowMut<T> for T
where T: ?Sized,

Source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
Source§

impl<T> CloneToUninit for T
where T: Clone,

Source§

unsafe fn clone_to_uninit(&self, dest: *mut u8)

🔬This is a nightly-only experimental API. (clone_to_uninit)
Performs copy-assignment from self to dest. Read more
Source§

impl<T> From<T> for T

Source§

fn from(t: T) -> T

Returns the argument unchanged.

Source§

impl<T, U> Into<U> for T
where U: From<T>,

Source§

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

Source§

impl<T, U> TryFrom<U> for T
where U: Into<T>,

Source§

type Error = Infallible

The type returned in the event of a conversion error.
Source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
Source§

impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

Source§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
Source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.