Trait Variant

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pub trait Variant {
    // Required methods
    fn decode(opcode: u8) -> Option<(Instruction, AddressingMode)>;
    fn adc_binary(
        accumulator: u8,
        value: u8,
        carry_set: bool,
    ) -> ArithmeticOutput;
    fn adc_decimal(
        accumulator: u8,
        value: u8,
        carry_set: bool,
    ) -> ArithmeticOutput;
    fn sbc_binary(
        accumulator: u8,
        value: u8,
        carry_set: bool,
    ) -> ArithmeticOutput;
    fn sbc_decimal(
        accumulator: u8,
        value: u8,
        carry_set: bool,
    ) -> ArithmeticOutput;

    // Provided methods
    fn penalty_cycles_for_decimal_mode() -> u8 { ... }
    fn penalty_cycles_for_indirect_jmp() -> u8 { ... }
    fn zero_page_base() -> u16 { ... }
    fn stack_base() -> u16 { ... }
    fn brk_vector() -> u16 { ... }
    fn reset_vector() -> u16 { ... }
    fn nmi_vector() -> u16 { ... }
}

Expand description

Trait for different 6502 CPU variants with their historical differences.

The 6502 family evolved over decades with various manufacturers creating specialized versions for different applications:

Revision A (1975): Very early 6502 variant missing the ROR instruction entirely. Found in early KIM-1 systems and some Apple-1 computers. The ROR instruction was intentionally unimplemented due to design constraints, not a “bug” as commonly believed. Production ended around June 1976.
NMOS 6502 (1976): Complete MOS Technology processor with working ROR instruction, used in Apple II, Commodore 64, Atari 2600. Has unreliable decimal mode flags but full BCD support. This became the standard reference implementation.
65C02 (1983): WDC’s CMOS version with bug fixes, additional instructions, and reliable decimal mode flags. Development began in 1981 with samples released in early 1983. Used in Apple IIc/IIe and many embedded systems.
Ricoh 2A03 (1983): Nintendo’s cost-reduced variant for NES/Famicom (released July 15, 1983). Removed decimal mode entirely to avoid patent issues. Used as a core in their custom ASIC which also included sound generation and other features.

Choose the variant that matches your target system for accurate emulation. Note that software written for later variants may not run on earlier ones due to missing instructions (particularly ROR on Revision A).

Required Methods§

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fn decode(opcode: u8) -> Option<(Instruction, AddressingMode)>

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fn adc_binary(accumulator: u8, value: u8, carry_set: bool) -> ArithmeticOutput

Execute Add with Carry (ADC) in binary mode

§Arguments

accumulator - Current accumulator value
value - Value to add
carry_set - Carry flag set at the time of execution

§Returns

Tuple of (result, carry_out, overflow, negative, zero)

Source

fn adc_decimal(accumulator: u8, value: u8, carry_set: bool) -> ArithmeticOutput

Execute Add with Carry (ADC) in decimal mode (BCD)

§Arguments

accumulator - Current accumulator value
value - Value to add
carry_set - Carry flag set at the time of execution

§Returns

Tuple of (result, carry_out, overflow, negative, zero)

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fn sbc_binary(accumulator: u8, value: u8, carry_set: bool) -> ArithmeticOutput

Execute Subtract with Carry (SBC) in binary mode

§Arguments

accumulator - Current accumulator value
value - Value to subtract
carry_set - Carry flag set at the time of execution

§Returns

Tuple of (result, carry_out, overflow, negative, zero)

Source

fn sbc_decimal(accumulator: u8, value: u8, carry_set: bool) -> ArithmeticOutput

Execute Subtract with Carry (SBC) in decimal mode (BCD)

§Arguments

accumulator - Current accumulator value
value - Value to subtract
carry_set - Carry flag set at the time of execution

§Returns

Tuple of (result, carry_out, overflow, negative, zero)

Provided Methods§

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fn penalty_cycles_for_decimal_mode() -> u8

Returns the cycle penalty for ADC/SBC in decimal mode for this variant.

NMOS/Ricoh: 0 (no penalty)
65C02: 1 (decimal mode adds an extra cycle)
Future variants may have different values

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fn penalty_cycles_for_indirect_jmp() -> u8

Returns the cycle penalty for JMP (indirect) for this variant.

NMOS/Ricoh: 0 (5 cycles total)
65C02: 1 (6 cycles total, also fixes page-crossing bug)
Future HMOS 7501: 0 (5 cycles)

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fn zero_page_base() -> u16

Base address of the zero page for this variant.

Standard 6502 family parts place the zero page at $0000. The HuC6280 relocates it to $2000 (reached through mapping register MPR1), so all zero-page and zero-page-indirect accesses are offset by this base.

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