Struct MOSVideoInterfaceControllerII 

#[repr(C, packed(1))]
pub struct MOSVideoInterfaceControllerII {

    pub sprite_positions: [XYcoordinate; 8],
    pub sprite_positions_most_significant_bit_of_x: RW<Sprites>,
    pub control_y: RW<ControlYFlags>,
    pub raster_counter: RW<u8>,
    pub lightpen_x: RW<u8>,
    pub lightpen_y: RW<u8>,
    pub sprite_enable: RW<Sprites>,
    pub control_x: RW<ControlXFlags>,
    pub sprite_expand_y: RW<Sprites>,
    pub screen_and_charset_bank: RW<u8>,
    pub irq_status: RW<InterruptFlags>,
    pub irq_enable: RW<IRQEnableFlags>,
    pub sprite_background_priority: RW<Sprites>,
    pub sprite_multicolor_mode: RW<Sprites>,
    pub sprite_expand_x: RW<Sprites>,
    pub sprite_sprite_collision: RO<Sprites>,
    pub sprite_background_collision: RO<Sprites>,
    pub border_color: RW<u8>,
    pub background_color0: RW<u8>,
    pub background_color1: RW<u8>,
    pub background_color2: RW<u8>,
    pub background_color3: RW<u8>,
    pub sprite_multicolor0: RW<u8>,
    pub sprite_multicolor1: RW<u8>,
    pub sprite_colors: [RW<u8>; 8],
}

Hardware registers for the MOS Technologies Video Interface Controller II

Fields

sprite_positions: [XYcoordinate; 8]

Sprite positions (x0, y0, x1, …)

sprite_positions_most_significant_bit_of_x: RW<Sprites>

MSIGX Most Significant Bits of Sprites 0-7 Horizontal Positions (0x10)

Setting one of these bits to 1 adds 256 to the horizontal position of the corresponding sprite. Resetting one to 0 restricts the horizontal position of the corresponding sprite to a value of 255 or less.

control_y: RW<ControlYFlags>

SCROLY Vertical Fine Scrolling and Control Register, 0x11

raster_counter: RW<u8>

RASTER Raster counter (0x12)

This has two different functions, depending on whether reading or writing:

1. When read, it tells which screen line the electron beam is currently scanning.
2. Writing to this register designates the comparison value for the Raster IRQ.

lightpen_x: RW<u8>

LPENX (0x13)

lightpen_y: RW<u8>

LPENY (0x14)

sprite_enable: RW<Sprites>

SPENA (0x15)

control_x: RW<ControlXFlags>

Offset 0x16

sprite_expand_y: RW<Sprites>

YXPAND (0x17)

screen_and_charset_bank: RW<u8>

VMCSB Memory Control Register (0x18)

irq_status: RW<InterruptFlags>

VICIRQ Interrupt flag (0x19)

The VIC-II chip is capable of generating a maskable request (IRQ) when certain conditions relating to the video display are fulfilled.

irq_enable: RW<IRQEnableFlags>

IRQMSK IRQ Mask Register (0x1a)

sprite_background_priority: RW<Sprites>

SPBGPR Place sprites behind (0) in infront of bitmaps (0x1b)

sprite_multicolor_mode: RW<Sprites>

SPMC (0x1c)

sprite_expand_x: RW<Sprites>

Offset 0x1d

sprite_sprite_collision: RO<Sprites>

Offset 0x1e

sprite_background_collision: RO<Sprites>

Offset 0x1f

border_color: RW<u8>

Offset 0x20

background_color0: RW<u8>

Offset 0x21

background_color1: RW<u8>

Offset 0x22

background_color2: RW<u8>

Offset 0x23

background_color3: RW<u8>

Offset 0x24

sprite_multicolor0: RW<u8>

Offset 0x25

sprite_multicolor1: RW<u8>

Offset 0x26

sprite_colors: [RW<u8>; 8]

SPxCOL Sprite Colors (0x2e)

Implementations

impl MOSVideoInterfaceControllerII

pub fn set_sprite_pos(&self, index: u8, xpos: u8, ypos: u8)

Sets position of sprite identified by it’s index

pub fn set_sprite_color(&self, index: u8, color: u8)

Sets color of sprite identified by it’s index