VersatileEmbeddedRetroAdapter

Struct VersatileEmbeddedRetroAdapter 

Source
#[repr(C)]
pub struct VersatileEmbeddedRetroAdapter {
Show 13 fields pub address: RW<u16>, pub address_hi: RW<u8>, pub data0: RW<u8>, pub data1: RW<u8>, pub control: RW<ControlFlags>, pub irq_enable: RW<u8>, pub irq_flags: RW<u8>, pub irq_raster: RW<u8>, pub display_composer: DisplayComposer, pub layer0: Layer, pub layer1: Layer, pub audio: Audio, pub spi: SPIController,
}
Expand description

Versatile Embedded Retro Adapter (VERA) graphics chip

Fields§

§address: RW<u16>

VRAM Address 0-16 (offset 0x00)

§address_hi: RW<u8>

ADDRx_H - Address (offset 0x02)

§data0: RW<u8>

DATA0 - VRAM Data port 0 (offset 0x03)

§data1: RW<u8>

DATA1 - VRAM Data port 1 (offset 0x04)

§control: RW<ControlFlags>

CTRL - Control, offset 0x05

§irq_enable: RW<u8>

IEN - Interrupt enable, offset 0x06

§irq_flags: RW<u8>

ISR - Interrupt flags, offset 0x07

§irq_raster: RW<u8>

IRQLINE_L - Interrupt raster, offset 0x08

IRQLINE specifies at which line the LINE interrupt will be generated. Note that bit 8 of this value is present in the IEN register. For interlaced modes the interrupt will be generated each field and the bit 0 of IRQ_LINE is ignored.

§display_composer: DisplayComposer

DC_VIDEO - Display composer

§layer0: Layer§layer1: Layer§audio: Audio

Audio (offset 0x1b)

§spi: SPIController

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