Module rules

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This module implements a first stage recursive descent parser for VHDL. It can process a stream of input tokens into the coarse, generalized abstract syntax tree defined in ast. The grammar productions/rules outlined in the VHDL standard are collapsed into more general rules as outlined in the following table.

VHDL StandardGeneralized to
aggregateparen_expr
array_constraintname
attribute_declarationattr_decl
attribute_namename
attribute_specificationattr_decl
block_specificationname
configuration_itemdecl_item
constraintprimary_expr
enumeration_type_definitionparen_expr
external_nameignored
function_callname
generate_specificationexpr
generic_clausegeneric_clause
generic_map_aspectmap_aspect
group_declarationgroup_decl
group_template_declarationgroup_decl
indexed_namename
interface_subprogram_declarationsubprog_spec
namename
name/character_literalprimary_name
name/operator_symbolprimary_name
name/simple_nameprimary_name
port_clauseport_clause
port_map_aspectmap_aspect
range_constraintname
record_constraintname, paren_expr
resolution_indicationprimary_expr
selected_namename
slice_namename
subprogram_bodysubprog_spec
subprogram_declarationsubprog_spec
subprogram_instantiation_declarationsubprog_spec
subtype_indicationname, primary_expr
targetprimary_expr
time_expressionexpr
type_markname

Structs§

Recovered
Reported

Enums§

ExprPrec
The precedence of an expression.

Traits§

Parser

Functions§

parse_alias_decl
Parse an alias declaration. See IEEE 1076-2008 section 6.6.
parse_arch_body
Parse an architecture body. See IEEE 1076-2008 section 3.3.
parse_assert_stmt
Parse an assertion statement. See IEEE 1076-2008 section 10.3.
parse_assign_dst_tail
parse_assign_tail
Parse the tail of an assign statement. This function assumes that the name of the signal to be assigned has already been parsed. See IEEE 1076-2008 section 10.5.
parse_attr_decl
Parse an attribute declaration or specification. See IEEE 1076-2008 sections 6.7 and 7.2.
parse_binding_ind
Parse a binding indication. See IEEE 1076-2008 section 7.3.2.1. The trailing semicolon is required only if at least one of the aspect has been parsed.
parse_block_comp_config
Parse a block or component configuration. See IEEE 1076-2008 sections 3.4.2 and 3.4.3.
parse_block_comp_decl_item
Parse a block or component configuration declarative item.
parse_block_comp_spec
Parse a block or component specification. See IEEE 1067-2008 section 7.3.1.
parse_block_stmt
Parse a block statement. See IEEE 1076-2008 section 11.2.
parse_case_generate_stmt
Parse a generate case statement. See IEEE 1076-2008 section 11.8.
parse_case_stmt
Parse a case statement. See IEEE 1076-2008 section 10.9.
parse_component_decl
Parse a component declaration. See IEEE 1076-2008 section 6.8.
parse_cond_waves
Parse a list of conditional waveforms. See IEEE 1076-2008 section 10.5.
parse_config_decl
Parse a configuration declaration. See IEEE 1076-2008 section 3.4.
parse_config_spec
Parse a configuration specification. See IEEE 1076-2008 section 7.3.1.
parse_context_decl
Parse a context declaration. IEEE 1076-2008 section 13.3.
parse_context_ref
parse_design_file
Parse an entire design file. IEEE 1076-2008 section 13.1.
parse_design_unit
Parse a single design unit. IEEE 1076-2008 section 13.1.
parse_discon_spec
Parse a disconnection specification. See IEEE 1076-2008 section 7.4.
parse_entity_class
Parse an entity class. See IEEE 1076-2008 section 7.2.
parse_entity_decl
Parse an entity declaration. See IEEE 1076-2008 section 3.2.
parse_expr
parse_expr_prec
Parse an expression with a precedence higher than prec.
parse_expr_suffix
Parse an expression suffix. Given an already parsed expression and its precedence, try to parse additional tokens that extend the already parsed expression. This is currently limited to binary operations.
parse_for_generate_stmt
Parse a generate for statement. See IEEE 1076-2008 section 11.8.
parse_generate_body
Parse a generate body. See IEEE 1076-2008 section 11.8.
parse_group_decl
Parse a group declaration or group template declaration. See IEEE 1076-2008 sections 6.9 and 6.10.
parse_if_generate_stmt
Parse a generate if statement. See IEEE 1076-2008 section 11.8.
parse_if_stmt
Parse an if statement. See IEEE 1076-2008 section 10.8.
parse_inst_or_call_tail
Parse the tail of an instantiation or procedure call statement. See IEEE 1076-2008 sections 10.7, 11.4, and 11.7.
parse_intf_decl
Parse an interface declaration. These are generally part of an interface list as they appear in generic and port clauses within for example entity declarations. See IEEE 1076-2008 section 6.5.1.
parse_library_clause
Parse a library clause. IEEE 1076-2008 section 13.2.
parse_loop_stmt
Parse a loop statement. See IEEE 1076-2008 section 10.10.
parse_name
Parse a name. IEEE 1076-2008 section 8.
parse_name_suffix
Parse the suffix to a name. IEEE 1076-2008 section 8.
parse_nexit_stmt
Parse a next or exit statement. See IEEE 1076-2008 sections 10.11 and 10.12.
parse_null_stmt
Parse a null statement. See IEEE 1076-2008 section 10.14.
parse_object_decl
Parse a constant, signal, variable, or file declaration. See IEEE 1076-2008 section 6.4.2.
parse_package_body
Parse a package body. See IEEE 1076-2008 section 4.8.
parse_package_decl
Parse a package declaration. See IEEE 1076-2008 section 4.7.
parse_package_inst
Parse a package instantiation declaration. See IEEE 1076-2008 section 4.9.
parse_paren_elem_vec
parse_paren_expr
Try to parse a parenthesized expression. This is a combination of a variety of rules from the VHDL grammar. Most notably, it combines the following:
parse_primary_expr
parse_proc_stmt
Parse a process statement. See IEEE 1076-2008 section 11.3.
parse_report_stmt
Parse a report statement. See IEEE 1076-2008 section 10.4.
parse_return_stmt
Parse a return statement. See IEEE 1076-2008 section 10.13.
parse_select_assign
Parse a select assign statement. See IEEE 1076-2008 section 10.5.
parse_selected_waves
Parse a list of selected waveforms. See IEEE 1076-2008 section 10.5.
parse_signature
parse_stmt
Parse a sequential or concurrent statement.
parse_subprog_decl_item
Parse a subprogram declarative item, which is either a subprogram declaration, body, or instantiation. See IEEE 1076-2008 section 4.2.
parse_subprog_spec
Parse a subprogram specification. This covers the initial part of a subprogram declaration, body, instantiation, or interface declaration. See IEEE 1076-2008 sections 4.2 and 6.5.4. Note that not all combinations of keywords and qualifiers that this parser accepts are actually valid.
parse_subtype_decl
Parse a subtype declaration. See IEEE 1076-2008 section 6.3.
parse_subtype_ind
Parse a subtype indication. See IEEE 1076-2008 section 6.3.
parse_type_decl
Parse a type declaration. See IEEE 1076-2008 section 6.2.
parse_use_clause
Parse a use clause. IEEE 1076-2008 section 12.4.
parse_vunit_binding_ind
parse_wait_stmt
Parse a wait statement. See IEEE 1076-2008 section 10.2.
parse_wave
Parse a waveform. See IEEE 1076-2008 section 10.5.
try_context_item
Parse a context item. IEEE 1076-2008 section 13.4.
try_decl_item
Try to parse a declarative item. See IEEE 1076-2008 section 3.2.3.
try_delay_mech
Try to parse a delay mechanism.
try_force_mode
try_generic_clause
Try to parse a generic clause. See IEEE 1076-2008 section 6.5.6.2.
try_label
Parse an optional label, which basically is just an identifier followed by a colon. This is interesting for statement parsing. See IEEE 1076-2008 section 10.
try_map_aspect
Try to parse a generic or port map aspect. See IEEE 1076-2008 sections 6.5.7.2 and 6.5.7.3.
try_name
Try to parse a name. IEEE 1076-2008 section 8.
try_name_or_qualified_primary_expr
try_paren_expr
try_port_clause
Try to parse a port clause. See IEEE 1076-2008 section 6.5.6.3.
try_primary_name
Try to parse a primary name. IEEE 1076-2008 section 8.

Type Aliases§

RecoveredResult
ReportedResult