Struct moore_svlog_syntax::ast::SubroutinePortDecl

pub struct SubroutinePortDecl {
    pub span: Span,
    pub dir: SubroutinePortDir,
    pub var: bool,
    pub ty: Type,
    pub names: Vec<VarDeclName>,
}

Fields

span: Span

dir: SubroutinePortDir

var: bool

ty: Type

names: Vec<VarDeclName>

Trait Implementations

impl Debug for SubroutinePortDecl

fn fmt(&self, __arg_0: &mut Formatter) -> Result

Formats the value using the given formatter.

impl Clone for SubroutinePortDecl

fn clone(&self) -> SubroutinePortDecl

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl PartialEq for SubroutinePortDecl

fn eq(&self, __arg_0: &SubroutinePortDecl) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, __arg_0: &SubroutinePortDecl) -> bool

This method tests for !=.

impl Eq for SubroutinePortDecl

impl Encodable for SubroutinePortDecl

fn encode<__S: Encoder>(&self, __arg_0: &mut __S) -> Result<(), __S::Error>

Serialize a value using an Encoder.

impl Decodable for SubroutinePortDecl

fn decode<__D: Decoder>(
    __arg_0: &mut __D
) -> Result<SubroutinePortDecl, __D::Error>

Deserialize a value using a Decoder.