Struct RegisterBlock 

#[repr(C)]
pub struct RegisterBlock { /* private fields */ }

Register block

Implementations

impl RegisterBlock

pub const fn mode(&self) -> &MODE

0x00 - Mode register. This :class:csr.Register contains an array of pin_count read/write fields. Each field is 2-bit wide and its possible values are defined by the :class:PinMode enumeration. If pin_count is 8, then the register has the following fields: .. bitfield:: :bits: 16 [ { “name”: “pin[0]”, “bits”: 2, “attr”: “RW” }, { “name”: “pin[1]”, “bits”: 2, “attr”: “RW” }, { “name”: “pin[2]”, “bits”: 2, “attr”: “RW” }, { “name”: “pin[3]”, “bits”: 2, “attr”: “RW” }, { “name”: “pin[4]”, “bits”: 2, “attr”: “RW” }, { “name”: “pin[5]”, “bits”: 2, “attr”: “RW” }, { “name”: “pin[6]”, “bits”: 2, “attr”: “RW” }, { “name”: “pin[7]”, “bits”: 2, “attr”: “RW” }, ] Parameters ––––– pin_count : :class:int Number of GPIO pins.

pub const fn input(&self) -> &INPUT

0x02 - Input register. This :class:csr.Register contains an array of pin_count read-only fields. Each field is 1-bit wide and driven by the input of its associated pin in the :attr:Peripheral.pins array. Values sampled from pin inputs go through :attr:Peripheral.input_stages synchronization stages (on a rising edge of ClockSignal("sync")) before reaching the register. If pin_count is 8, then the register has the following fields: .. bitfield:: :bits: 8 [ { “name”: “pin[0]”, “bits”: 1, “attr”: “R” }, { “name”: “pin[1]”, “bits”: 1, “attr”: “R” }, { “name”: “pin[2]”, “bits”: 1, “attr”: “R” }, { “name”: “pin[3]”, “bits”: 1, “attr”: “R” }, { “name”: “pin[4]”, “bits”: 1, “attr”: “R” }, { “name”: “pin[5]”, “bits”: 1, “attr”: “R” }, { “name”: “pin[6]”, “bits”: 1, “attr”: “R” }, { “name”: “pin[7]”, “bits”: 1, “attr”: “R” }, ] Parameters ––––– pin_count : :class:int Number of GPIO pins.

pub const fn output(&self) -> &OUTPUT

0x03 - Output register. This :class:csr.Register contains an array of pin_count read/write fields. Each field is 1-bit wide and drives the output of its associated pin in the :attr:Peripheral.pins array, depending on its associated :class:~Peripheral.Mode field. If pin_count is 8, then the register has the following fields: .. bitfield:: :bits: 8 [ { “name”: “pin[0]”, “bits”: 1, “attr”: “RW” }, { “name”: “pin[1]”, “bits”: 1, “attr”: “RW” }, { “name”: “pin[2]”, “bits”: 1, “attr”: “RW” }, { “name”: “pin[3]”, “bits”: 1, “attr”: “RW” }, { “name”: “pin[4]”, “bits”: 1, “attr”: “RW” }, { “name”: “pin[5]”, “bits”: 1, “attr”: “RW” }, { “name”: “pin[6]”, “bits”: 1, “attr”: “RW” }, { “name”: “pin[7]”, “bits”: 1, “attr”: “RW” }, ] Parameters ––––– pin_count : :class:int Number of GPIO pins.

pub const fn set_clr(&self) -> &SET_CLR

0x04 - Output set/clear register. This :class:csr.Register contains an array of pin_count write-only fields. Each field is 2-bit wide; writing it can modify its associated :class:~Peripheral.Output field as a side-effect. If pin_count is 8, then the register has the following fields: .. bitfield:: :bits: 16 [ { “name”: “pin[0]”, “bits”: 2, “attr”: “W” }, { “name”: “pin[1]”, “bits”: 2, “attr”: “W” }, { “name”: “pin[2]”, “bits”: 2, “attr”: “W” }, { “name”: “pin[3]”, “bits”: 2, “attr”: “W” }, { “name”: “pin[4]”, “bits”: 2, “attr”: “W” }, { “name”: “pin[5]”, “bits”: 2, “attr”: “W” }, { “name”: “pin[6]”, “bits”: 2, “attr”: “W” }, { “name”: “pin[7]”, “bits”: 2, “attr”: “W” }, ]

• Writing 0b01 to a field sets its associated :class:~Peripheral.Output field. - Writing 0b10 to a field clears its associated :class:~Peripheral.Output field. - Writing 0b00 or 0b11 to a field has no side-effect. Parameters ––––– pin_count : :class:int Number of GPIO pins.