RegisterBlock

mm32f5::i2c1

Struct RegisterBlock 

Source 
pub struct RegisterBlock {
Show 53 fields
    pub cr: CR,
    pub tar: TAR,
    pub sar: SAR,
    pub dr: DR,
    pub sshr: SSHR,
    pub sslr: SSLR,
    pub fshr: FSHR,
    pub fslr: FSLR,
    pub isr: ISR,
    pub imr: IMR,
    pub rawisr: RAWISR,
    pub rxtlr: RXTLR,
    pub txtlr: TXTLR,
    pub icr: ICR,
    pub rx_under: RX_UNDER,
    pub rx_over: RX_OVER,
    pub tx_over: TX_OVER,
    pub rd_req: RD_REQ,
    pub tx_abrt: TX_ABRT,
    pub rx_done: RX_DONE,
    pub activ: ACTIV,
    pub stop: STOP,
    pub start: START,
    pub gc: GC,
    pub enr: ENR,
    pub sr: SR,
    pub txflr: TXFLR,
    pub rxflr: RXFLR,
    pub hold: HOLD,
    pub tx_abrt_src: TX_ABRT_SRC,
    pub slv_nack: SLV_NACK,
    pub dma: DMA,
    pub setup: SETUP,
    pub gcr: GCR,
    pub en_sr: EN_SR,
    pub spklen: SPKLEN,
    pub scl_tmo: SCL_TMO,
    pub sda_tmo: SDA_TMO,
    pub scl_stuck: SCL_STUCK,
    pub smb_sext: SMB_SEXT,
    pub smb_mext: SMB_MEXT,
    pub smb_idle: SMB_IDLE,
    pub smb_isr: SMB_ISR,
    pub smb_imr: SMB_IMR,
    pub smb_rawisr: SMB_RAWISR,
    pub smb_icr: SMB_ICR,
    pub opt_sar: OPT_SAR,
    pub smb_udid_lsb: SMB_UDID_LSB,
    pub smb_udid_msb0: SMB_UDID_MSB0,
    pub smb_udid_msb1: SMB_UDID_MSB1,
    pub smb_udid_msb2: SMB_UDID_MSB2,
    pub slvmask: SLVMASK,
    pub slvrcvaddr: SLVRCVADDR,
    /* private fields */

}
Expand description

Register block

Fields§

§cr: CR

0x00 - control register

§tar: TAR

0x04 - target address register

§sar: SAR

0x08 - slave address register

§dr: DR

0x10 - Data Command Register

§sshr: SSHR

0x14 - Standard Mode Clock High Count Register

§sslr: SSLR

0x18 - Standard Mode Clock Low Count Register

§fshr: FSHR

0x1c - Fast/Super Fast Mode Clock High Count Register

§fslr: FSLR

0x20 - Fast/Super Fast Mode Clock Low Count Register

§isr: ISR

0x2c - Interrupt Status Register

§imr: IMR

0x30 - interrupt mask register

§rawisr: RAWISR

0x34 - RAW interrupt register

§rxtlr: RXTLR

0x38 - receive threshold register

§txtlr: TXTLR

0x3c - Transmit Threshold Register

§icr: ICR

0x40 - Combined and Independent Interrupt Clear Registers

§rx_under: RX_UNDER

0x44 - Clear the RX_UNDER interrupt register

§rx_over: RX_OVER

0x48 - Clear the RX_OVER interrupt register

§tx_over: TX_OVER

0x4c - Clear the TX_OVER interrupt register

§rd_req: RD_REQ

0x50 - Clear the RD_REQ interrupt register

§tx_abrt: TX_ABRT

0x54 - Clear the TX_ABRT interrupt register

§rx_done: RX_DONE

0x58 - Clear the RX_DONE interrupt register

§activ: ACTIV

0x5c - Clear the ACTIVITY interrupt register

§stop: STOP

0x60 - Clear the STOP_DET interrupt register

§start: START

0x64 - Clear the START_DET interrupt register

§gc: GC

0x68 - Clear the GEN_CALL interrupt register

§enr: ENR

0x6c - enable register

§sr: SR

0x70 - status register

§txflr: TXFLR

0x74 - Transmit buffer level register

§rxflr: RXFLR

0x78 - Receive buffer level register

§hold: HOLD

0x7c - SDA hold time register

§tx_abrt_src: TX_ABRT_SRC

0x80 - Transfer Abort Source Register

§slv_nack: SLV_NACK

0x84 - Slave Receive NACK Register

§dma: DMA

0x88 - DMA Control Register

§setup: SETUP

0x94 - SDA setup time register

§gcr: GCR

0x98 - General Call ACK Register

§en_sr: EN_SR

0x9c - ENABLE Status Register

§spklen: SPKLEN

0xa0 - filter register

§scl_tmo: SCL_TMO

0xac - SCL Low Timeout Register

§sda_tmo: SDA_TMO

0xb0 - SDA Low Timeout Register

§scl_stuck: SCL_STUCK

0xb4 - Clear the SCL_STUCK interrupt register

§smb_sext: SMB_SEXT

0xbc - SMBus Slave Clock Stretching Timeout Register

§smb_mext: SMB_MEXT

0xc0 - SMBus Master Clock Stretching Timeout Register

§smb_idle: SMB_IDLE

0xc4 - SMBus Bus Idle Count Register

§smb_isr: SMB_ISR

0xc8 - SMBus Interrupt Status Register

§smb_imr: SMB_IMR

0xcc - SMBus Interrupt Mask Register

§smb_rawisr: SMB_RAWISR

0xd0 - SMBus RAW Interrupt Register

§smb_icr: SMB_ICR

0xd4 - SMBus Combined and Independent Interrupt Clear Registers

§opt_sar: OPT_SAR

0xd8 - Optional Slave Address Register

§smb_udid_lsb: SMB_UDID_LSB

0xdc - SMBus UDID LSB Register

§smb_udid_msb0: SMB_UDID_MSB0

0xe0 - SMBus UDID MSB Register 0

§smb_udid_msb1: SMB_UDID_MSB1

0xe4 - SMBus UDID MSB Register 1

§smb_udid_msb2: SMB_UDID_MSB2

0xe8 - SMBus UDID MSB Register 2

§slvmask: SLVMASK

0xec - Slave Address Mask Register

§slvrcvaddr: SLVRCVADDR

0xf0 - Slave Receive Address Register

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