Struct I2s2

pub struct I2s2 { /* private fields */ }

LPC-Next0 I2S interface

Implementations

impl I2s2

pub const PTR: *const RegisterBlock = {0x40108000 as *const i2s0::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn cfg1(&self) -> &Cfg1

0xc00 - Configuration register 1 for the primary channel pair.

pub fn cfg2(&self) -> &Cfg2

0xc04 - Configuration register 2 for the primary channel pair.

pub fn stat(&self) -> &Stat

0xc08 - Status register for the primary channel pair.

pub fn div(&self) -> &Div

0xc1c - Clock divider, used by all channel pairs.

pub fn secchannel(&self, n: usize) -> &Secchannel

0xc20..0xc44 - Array of registers: PCFG1, PCFG2, PSTAT

pub fn secchannel_iter(&self) -> impl Iterator<Item = &Secchannel>

Iterator for array of: 0xc20..0xc44 - Array of registers: PCFG1, PCFG2, PSTAT

pub fn fifocfg(&self) -> &Fifocfg

0xe00 - FIFO configuration and enable register.

pub fn fifostat(&self) -> &Fifostat

0xe04 - FIFO status register.

pub fn fifotrig(&self) -> &Fifotrig

0xe08 - FIFO trigger settings for interrupt and DMA request.

pub fn fifointenset(&self) -> &Fifointenset

0xe10 - FIFO interrupt enable set (enable) and read register.

pub fn fifointenclr(&self) -> &Fifointenclr

0xe14 - FIFO interrupt enable clear (disable) and read register.

pub fn fifointstat(&self) -> &Fifointstat

0xe18 - FIFO interrupt status register.

pub fn fifowr(&self) -> &Fifowr

0xe20 - FIFO write data.

pub fn fifowr48h(&self) -> &Fifowr48h

0xe24 - FIFO write data for upper data bits. May only be used if the I2S is configured for 2x 24-bit data and not using DMA.

pub fn fiford(&self) -> &Fiford

0xe30 - FIFO read data.

pub fn fiford48h(&self) -> &Fiford48h

0xe34 - FIFO read data for upper data bits. May only be used if the I2S is configured for 2x 24-bit data and not using DMA.

pub fn fifordnopop(&self) -> &Fifordnopop

0xe40 - FIFO data read with no FIFO pop.

pub fn fiford48hnopop(&self) -> &Fiford48hnopop

0xe44 - FIFO data read for upper data bits with no FIFO pop. May only be used if the I2S is configured for 2x 24-bit data and not using DMA.

pub fn fifosize(&self) -> &Fifosize

0xe48 - FIFO size register

pub fn id(&self) -> &Id

0xffc - I2S Module identification

Trait Implementations

impl Debug for I2s2

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for I2s2

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for I2s2