Struct Chiplets 

pub struct Chiplets {
    pub hasher: Hasher,
    pub bitwise: Bitwise,
    pub memory: Memory,
    pub ace: Ace,
    pub kernel_rom: KernelRom,
}

This module manages the VM’s hasher, bitwise, memory, arithmetic circuit evaluation (ACE) and kernel ROM chiplets and is responsible for building a final execution trace from their stacked execution traces and chiplet selectors.

The chiplets trace is five stacked chiplet segments followed by padding.

The chiplets trace has 22 columns. Columns 0-4 (s0..s4) form a selector prefix chain. The hasher controller is selected by s0=0; the remaining regions are selected by the first zero after an active prefix. Column 21 holds chip_clk, the chiplet-trace row counter.

column:   0..20                                      21
         selector prefix / chiplet payload          chip_clk
         ----------------------------------------    --------
hasher   s0=0, controller payload in columns 1..20   clk
bitwise  s0=1, s1=0, payload in columns 2..14        clk
memory   s0=s1=1, s2=0, payload in columns 3..19     clk
ACE      s0=s1=s2=1, s3=0, payload in columns 4..19  clk
kernel   s0=s1=s2=s3=1, s4=0, payload in columns 5..9 clk
padding  s0=s1=s2=s3=s4=1, zero payload              clk

• Hasher segment: fills the first rows of the trace up to the hasher trace_len.

  • column 0 (s0): ZERO
  • columns 1-20: execution trace of the hasher controller

• Bitwise segment: begins at the end of the hasher segment.

  • column 0 (s0): ONE
  • column 1 (s1): ZERO
  • columns 2-14: execution trace of bitwise chiplet
  • columns 15-20: unused columns padded with ZERO

• Memory segment: begins at the end of the bitwise segment.

  • column 0 (s0): ONE
  • column 1 (s1): ONE
  • column 2 (s2): ZERO
  • columns 3-19: execution trace of memory chiplet
  • column 20: unused, padded with ZERO

• ACE segment: begins at the end of the memory segment.

  • columns 0-2 (s0, s1, s2): ONE
  • column 3 (s3): ZERO
  • columns 4-19: execution trace of ACE chiplet
  • column 20: unused, padded with ZERO

• Kernel ROM segment: begins at the end of the ACE segment.

  • columns 0-3 (s0, s1, s2, s3): ONE
  • column 4 (s4): ZERO
  • columns 5-9: execution trace of kernel ROM chiplet
  • columns 10-20: unused columns padded with ZERO

• Padding segment: fills the rest of the trace.

  • columns 0-4 (s0..s4): ONE
  • columns 5-20: unused columns padded with ZERO

Fields

hasher: Hasher

bitwise: Bitwise

memory: Memory

ace: Ace

kernel_rom: KernelRom

Implementations

impl Chiplets

pub fn trace_len(&self) -> usize

Returns the chiplets trace length, including the mandatory padding row used by auxiliary connector columns that read the memory chiplet.

pub fn poseidon2_permutation_trace_len(&self) -> usize

Returns the unpadded trace length of the Poseidon2 permutation AIR.

pub fn bitwise_start(&self) -> RowIndex

Returns the index of the first row of Bitwise execution trace.

pub fn memory_start(&self) -> RowIndex

Returns the index of the first row of the Memory execution trace.

pub fn ace_start(&self) -> RowIndex

Returns the index of the first row of the ACE execution trace.

pub fn kernel_rom_start(&self) -> RowIndex

Returns the index of the first row of KernelRom execution trace.

pub fn padding_start(&self) -> RowIndex

Returns the index of the first row of the padding section of the execution trace.

pub fn append_range_checks(&self, range_checker: &mut RangeChecker)

Adds all range checks required by the memory chiplet to the provided `RangeChecker`` instance.

pub fn into_traces( self, trace_len: usize, poseidon2_trace_len: usize, ) -> (ChipletsTrace, Poseidon2PermutationTrace)

Returns execution traces for ChipletsAir and Poseidon2PermutationAir.

Trait Implementations

impl Debug for Chiplets

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.