Struct Chiplets 

pub struct Chiplets {
    pub hasher: Hasher,
    pub bitwise: Bitwise,
    pub memory: Memory,
    pub ace: Ace,
    pub kernel_rom: KernelRom,
}

This module manages the VM’s hasher, bitwise, memory, arithmetic circuit evaluation (ACE) and kernel ROM chiplets and is responsible for building a final execution trace from their stacked execution traces and chiplet selectors.

The module’s trace can be thought of as 6 stacked segments in the following form.

The chiplet system uses two physical selector columns (s_ctrl = column 0 and s_perm = column 20) plus the virtual s0 = 1 - (s_ctrl + s_perm) to partition rows into three top-level regions. Columns 1-4 (s1..s4) subdivide the s0 region.

• Hasher segment: fills the first rows of the trace up to the hasher trace_len. Split into controller (s_ctrl=1, s_perm=0) and permutation (s_ctrl=0, s_perm=1) sub-regions.

  • column 0 (s_ctrl): 1 on controller rows, 0 on permutation rows
  • columns 1-19: execution trace of hash chiplet
  • column 20 (s_perm): 0 on controller rows, 1 on permutation rows

• Bitwise segment: begins at the end of the hasher segment.

  • column 0 (s_ctrl): ZERO
  • column 1 (s1): ZERO
  • columns 2-14: execution trace of bitwise chiplet
  • columns 15-20: unused columns padded with ZERO

• Memory segment: begins at the end of the bitwise segment.

  • column 0 (s_ctrl): ZERO
  • column 1 (s1): ONE
  • column 2 (s2): ZERO
  • columns 3-19: execution trace of memory chiplet
  • column 20: unused column padded with ZERO

• ACE segment: begins at the end of the memory segment.

  • column 0 (s_ctrl): ZERO
  • column 1-2 (s1, s2): ONE
  • column 3 (s3): ZERO
  • columns 4-20: execution trace of ACE chiplet

• Kernel ROM segment: begins at the end of the ACE segment.

  • column 0 (s_ctrl): ZERO
  • columns 1-3 (s1, s2, s3): ONE
  • column 4 (s4): ZERO
  • columns 5-9: execution trace of kernel ROM chiplet
  • columns 10-20: unused columns padded with ZERO

• Padding segment: fills the rest of the trace.

  • column 0 (s_ctrl): ZERO
  • columns 1-4 (s1..s4): ONE
  • columns 5-20: unused columns padded with ZERO

The following is a pictorial representation of the chiplet module:

       s_ctrl s1  s2  s3  s4  s_perm
         [0] [1] [2] [3] [4]   [20]
        +---+----------------------------------------------------------+---+
 ctrl   | 1 |       Hash chiplet (controller rows)                     | 0 |
        | . |       20 columns                                         | . |
        | 1 |       constraint degree 9                                | 0 |
        +---+                                                          +---+
 perm   | 0 |       Hash chiplet (permutation rows)                    | 1 |
        | . |                                                          | . |
        | 0 |                                                          | 1 |
        +---+---+------------------------------------------------------+---+
        | 0 | 0 |                                                      |---|
        | . | . |                Bitwise chiplet                       |---|
        | . | . |                  13 columns                          |---|
        | 0 | 0 |             constraint degree 5                      |---|
        | . +---+---+--------------------------------------------------+---+
        | . | 1 | 0 |                                                  |---|
        | . | . | . |          Memory chiplet                          |---|
        | . | . | . |            17 columns                            |---|
        | . | . | 0 |        constraint degree 9                       |---|
        | . + . +---+---+----------------------------------------------+---+
        | . | . | 1 | 0 |                                              |---|
        | . | . | . | . |        ACE chiplet                           |---|
        | . | . | . | . |          16 columns                          |---|
        | . | . | . | 0 |      constraint degree 5                     |---|
        | . + . | . +---+---+-------------------------+--------------------+
        | . | . | . | 1 | 0 |                         |--------------------|
        | . | . | . | . | . |   Kernel ROM chiplet    |--------------------|
        | . | . | . | . | . |   5 columns             |--------------------|
        | . | . | . | . | 0 |   constraint degree 9   |--------------------|
        | . + . | . | . +---+-------------------------+--------------------+
        | . | . | . | . | 1 |-------- Padding ---------|                   |
        | . | . | . | . | . |                          |                   |
        | 0 | 1 | 1 | 1 | 1 |                          | 0                |
        +---+---+---+---+---+--------------------------+-------------------+

Fields

hasher: Hasher

bitwise: Bitwise

memory: Memory

ace: Ace

kernel_rom: KernelRom

Implementations

impl Chiplets

pub fn new(kernel: Kernel) -> Self

Returns a new Chiplets component instantiated with the provided Kernel.

pub fn trace_len(&self) -> usize

Returns the length of the trace required to accommodate chiplet components and 1 mandatory padding row required for ensuring sufficient trace length for auxiliary connector columns that rely on the memory chiplet.

pub fn bitwise_start(&self) -> RowIndex

Returns the index of the first row of Bitwise execution trace.

pub fn memory_start(&self) -> RowIndex

Returns the index of the first row of the Memory execution trace.

pub fn ace_start(&self) -> RowIndex

Returns the index of the first row of KernelRom execution trace.

pub fn kernel_rom_start(&self) -> RowIndex

Returns the index of the first row of KernelRom execution trace.

pub fn padding_start(&self) -> RowIndex

Returns the index of the first row of the padding section of the execution trace.

pub fn append_range_checks(&self, range_checker: &mut RangeChecker)

Adds all range checks required by the memory chiplet to the provided `RangeChecker`` instance.

pub fn into_trace(self, trace_len: usize) -> ChipletsTrace

Returns an execution trace of the chiplets containing the stacked traces of the Hasher, Bitwise, ACE, Memory chiplets, and kernel ROM chiplet.

Trait Implementations

impl Debug for Chiplets

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.