#[repr(u8)]pub enum Pgs {
VTR = 0,
VCC = 1,
UNPOWERED = 2,
_RESERVED_3 = 3,
}Expand description
Power Gating Signals provide the chip Power Emulation options.
Variants§
VTR = 0
The output buffer is tristated when VTR_PWRGD=0.
VCC = 1
The output buffer is tristated when VCC_PWRGD=0.
UNPOWERED = 2
The always unpowered setting on a GPIO will force the pin to tristate. The input and output are disabled, and the pad is in the lowest power state.
_RESERVED_3 = 3
Implementations§
Trait Implementations§
Source§impl Ord for Pgs
impl Ord for Pgs
Source§impl PartialOrd for Pgs
impl PartialOrd for Pgs
impl Copy for Pgs
impl Eq for Pgs
impl StructuralPartialEq for Pgs
Auto Trait Implementations§
impl Freeze for Pgs
impl RefUnwindSafe for Pgs
impl Send for Pgs
impl Sync for Pgs
impl Unpin for Pgs
impl UnwindSafe for Pgs
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more