Struct microbit::hal::pac::spim0::RegisterBlock[−]

#[repr(C)]
pub struct RegisterBlock {
Show fields
    pub tasks_start: Reg<u32, _TASKS_START>,
    pub tasks_stop: Reg<u32, _TASKS_STOP>,
    pub tasks_suspend: Reg<u32, _TASKS_SUSPEND>,
    pub tasks_resume: Reg<u32, _TASKS_RESUME>,
    pub events_stopped: Reg<u32, _EVENTS_STOPPED>,
    pub events_endrx: Reg<u32, _EVENTS_ENDRX>,
    pub events_end: Reg<u32, _EVENTS_END>,
    pub events_endtx: Reg<u32, _EVENTS_ENDTX>,
    pub events_started: Reg<u32, _EVENTS_STARTED>,
    pub shorts: Reg<u32, _SHORTS>,
    pub intenset: Reg<u32, _INTENSET>,
    pub intenclr: Reg<u32, _INTENCLR>,
    pub stallstat: Reg<u32, _STALLSTAT>,
    pub enable: Reg<u32, _ENABLE>,
    pub psel: PSEL,
    pub frequency: Reg<u32, _FREQUENCY>,
    pub rxd: RXD,
    pub txd: TXD,
    pub config: Reg<u32, _CONFIG>,
    pub iftiming: IFTIMING,
    pub csnpol: Reg<u32, _CSNPOL>,
    pub pseldcx: Reg<u32, _PSELDCX>,
    pub dcxcnt: Reg<u32, _DCXCNT>,
    pub orc: Reg<u32, _ORC>,
    // some fields omitted

}
Expand description

Register block

Fields

tasks_start: Reg<u32, _TASKS_START>

0x10 - Start SPI transaction

tasks_stop: Reg<u32, _TASKS_STOP>

0x14 - Stop SPI transaction

tasks_suspend: Reg<u32, _TASKS_SUSPEND>

0x1c - Suspend SPI transaction

tasks_resume: Reg<u32, _TASKS_RESUME>

0x20 - Resume SPI transaction

events_stopped: Reg<u32, _EVENTS_STOPPED>

0x104 - SPI transaction has stopped

events_endrx: Reg<u32, _EVENTS_ENDRX>

0x110 - End of RXD buffer reached

events_end: Reg<u32, _EVENTS_END>

0x118 - End of RXD buffer and TXD buffer reached

events_endtx: Reg<u32, _EVENTS_ENDTX>

0x120 - End of TXD buffer reached

events_started: Reg<u32, _EVENTS_STARTED>

0x14c - Transaction started

shorts: Reg<u32, _SHORTS>

0x200 - Shortcuts between local events and tasks

intenset: Reg<u32, _INTENSET>

0x304 - Enable interrupt

intenclr: Reg<u32, _INTENCLR>

0x308 - Disable interrupt

stallstat: Reg<u32, _STALLSTAT>

0x400 - Stall status for EasyDMA RAM accesses. The fields in this register is set to STALL by hardware whenever a stall occurres and can be cleared (set to NOSTALL) by the CPU.

enable: Reg<u32, _ENABLE>

0x500 - Enable SPIM

psel: PSEL

0x508 - Unspecified

frequency: Reg<u32, _FREQUENCY>

0x524 - SPI frequency. Accuracy depends on the HFCLK source selected.

rxd: RXD

0x534 - RXD EasyDMA channel

txd: TXD

0x544 - TXD EasyDMA channel

config: Reg<u32, _CONFIG>

0x554 - Configuration register

iftiming: IFTIMING

0x560 - Unspecified

csnpol: Reg<u32, _CSNPOL>

0x568 - Polarity of CSN output

pseldcx: Reg<u32, _PSELDCX>

0x56c - Pin select for DCX signal

dcxcnt: Reg<u32, _DCXCNT>

0x570 - DCX configuration

orc: Reg<u32, _ORC>

0x5c0 - Byte transmitted after TXD.MAXCNT bytes have been transmitted in the case when RXD.MAXCNT is greater than TXD.MAXCNT

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