Struct mextk_sys::CollLine

#[repr(C)]pub struct CollLine {
    pub info: *mut CollLineInfo,
    pub x4: u8_,
    pub _bitfield_1: __BindgenBitfieldUnit<[u8; 1], u8>,
    pub x6: u8_,
    pub _bitfield_2: __BindgenBitfieldUnit<[u8; 1], u8>,
    pub __bindgen_padding_0: u32,
}

Fields

info: *mut CollLineInfo

x4: u8_

_bitfield_1: __BindgenBitfieldUnit<[u8; 1], u8>

x6: u8_

_bitfield_2: __BindgenBitfieldUnit<[u8; 1], u8>

__bindgen_padding_0: u32

Implementations

impl CollLine

pub fn x5_1(&self) -> u8_

pub fn set_x5_1(&mut self, val: u8_)

pub fn x5_2(&self) -> u8_

pub fn set_x5_2(&mut self, val: u8_)

pub fn x5_3(&self) -> u8_

pub fn set_x5_3(&mut self, val: u8_)

pub fn x5_4(&self) -> u8_

pub fn set_x5_4(&mut self, val: u8_)

pub fn x5_5(&self) -> u8_

pub fn set_x5_5(&mut self, val: u8_)

pub fn x5_6(&self) -> u8_

pub fn set_x5_6(&mut self, val: u8_)

pub fn x5_7(&self) -> u8_

pub fn set_x5_7(&mut self, val: u8_)

pub fn is_enabled(&self) -> u8_

pub fn set_is_enabled(&mut self, val: u8_)

pub fn new_bitfield_1(
    x5_1: u8_,
    x5_2: u8_,
    x5_3: u8_,
    x5_4: u8_,
    x5_5: u8_,
    x5_6: u8_,
    x5_7: u8_,
    is_enabled: u8_
) -> __BindgenBitfieldUnit<[u8; 1], u8>

pub fn x7(&self) -> u8_

pub fn set_x7(&mut self, val: u8_)

pub fn is_rwall(&self) -> u8_

pub fn set_is_rwall(&mut self, val: u8_)

pub fn is_lwall(&self) -> u8_

pub fn set_is_lwall(&mut self, val: u8_)

pub fn is_ceil(&self) -> u8_

pub fn set_is_ceil(&mut self, val: u8_)

pub fn is_floor(&self) -> u8_

pub fn set_is_floor(&mut self, val: u8_)

pub fn new_bitfield_2(
    x7: u8_,
    is_rwall: u8_,
    is_lwall: u8_,
    is_ceil: u8_,
    is_floor: u8_
) -> __BindgenBitfieldUnit<[u8; 1], u8>

Trait Implementations

impl Clone for CollLine

fn clone(&self) -> CollLine

Returns a copy of the value.

pub fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for CollLine

impl Debug for CollLine

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.