Struct Fp8Dense 

pub struct Fp8Dense {
    pub codes: CudaSlice<u8>,
    pub scales: CudaSlice<f32>,
    pub sc_cols: usize,
    pub rows: usize,
    pub cols: usize,
}

Iteration-5 FP8 dense arm (MEMRA_DSV4_DENSE_ARM=fp8): an FP8-blk linear held AS-STORED — e4m3 codes [rows, cols] plus the 128x128 block-scale grid decoded to f32 on the host (exact: every e8m0 code is a pow2; 0xFF refused at load). The device GEMV twins decode e4m3(code) * scale in-register — the SAME f32 value the bf16 dequant slab holds (the loader’s f32_to_bf16_exact refusal proves exactness), with the accumulation order VERBATIM — so the arm is bit-identical to the bf16 arm by construction and its gate is a no-regression proof. It5 ledger item 3: when this pair exists, the bf16 twin is NOT device-resident — it drops to DenseBf16::Host staged residency (the dual-residency +~2.7 GiB/card is gone).

Fields

codes: CudaSlice<u8>

scales: CudaSlice<f32>

sc_cols: usize

rows: usize

cols: usize