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HcTapSink

Struct HcTapSink 

Source
pub struct HcTapSink {
    pub layer_ids: Vec<usize>,
    pub rows: Vec<f32>,
    pub hidden: usize,
    pub t: usize,
    pub base: usize,
    pub origin: usize,
    pub dev: Vec<Option<CudaSlice<f32>>>,
    pub device_stage: bool,
    pub dtoh_ns: u64,
    pub ingest_state: Option<Box<dyn Any + Send>>,
}
Expand description

See Cache::hc_taps. Armed per walk by the glm5 DFlash2 draft source; the hc trunk writes the CONTRACTED (stream-mean) completed output of tapped layer layer_ids[s] for walk row r at rows[(base + r) * n_taps * hidden + s * hidden ..][..hidden] — the drafter fc’s input layout, measured by the dflash2 probe’s capture seam (research/glm53-flash-bringup-20260827/dflash2-probe-20260829/: stream-mean of the completed layer output == the SGLang glm5_next hc_contract aux-hidden definition).

Fields§

§layer_ids: Vec<usize>

Plan layer indices whose COMPLETED output is tapped, in drafter fc slot order.

§rows: Vec<f32>

Host rows, [t, n_taps * hidden] row-major.

§hidden: usize§t: usize

Total rows the sink covers.

§base: usize

Row offset of the CURRENT walk’s row 0 (chunked primes set it per chunk; the verify walk leaves it 0).

§origin: usize

ABSOLUTE position of sink row 0 (lane/glm5-prefix-latent2, 2026-09-01): a SUFFIX prime over a restored cache writes at cache.pos-derived bases starting at the restored boundary, while its sink covers only the suffix rows — the writer lands row r of a walk at sink row base - origin + r. Fresh-prompt sinks leave it 0 (byte-identical indexing to before the field existed).

§dev: Vec<Option<CudaSlice<f32>>>

DEVICE STAGING (lane/glm5-loop-port, 2026-08-30): one optional [t * hidden] buffer per tap slot, allocated lazily by the walk ON THE WRITING engine’s device (under a ppN split each tapped layer belongs to exactly one stage, so a slot’s buffer lives where its layer runs). When device_stage is set the trunk walk D2D-copies the contracted rows here instead of blocking on a mid-walk DtoH — the five in-walk host syncs the 3way window priced into the fixed round cost (map row #17) — and the round drains every slot into rows at its ONE post-walk sync point.

§device_stage: bool

Arm device staging. Verify-round sinks set it; PRIME sinks stay host-staged BY DESIGN — a [prompt, hidden] per-slot device transient at 16k-prompt depth is ~1.3 GiB of VRAM the prime must not hold, and the prime’s per-chunk DtoH amortizes over >= 256 rows (DFlash2 TTFT is near-constant already, 3way cell 4). (lane/spec-route-depth-20260902: the chunked drafter prime arms a device-staged sink PER PRIME CHUNK via new_device_staged_at, so the transient is one chunk’s rows, never the prompt’s.)

§dtoh_ns: u64

Host-staged writes: nanoseconds the walk spent in the synchronous tap DtoHs (lane/spec-route-depth-20260902 attribution; 0 on device-staged sinks).

§ingest_state: Option<Box<dyn Any + Send>>

DEVICE-RESIDENT INGEST STATE (lane/spec-route-depth-20260902, MEMRA_GLM5_DRAFT_TAPS_DEVICE): an engine-owned, type-erased consumer the prime’s range loop hands each completed range to (glm5_taps_range_done), so the tap rows go from the trunk’s device slots straight into the drafter KV — no DtoH in the prime, no HtoD in the drafter prime. Opaque here on purpose: the drafter KV is an engine type and this crate stays below it. None = the sink is a plain staging sink.

Implementations§

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impl HcTapSink

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pub fn new(layer_ids: Vec<usize>, hidden: usize, t: usize) -> HcTapSink

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pub fn new_at( layer_ids: Vec<usize>, hidden: usize, t: usize, origin: usize, ) -> HcTapSink

Suffix-prime sink (doc on Self::origin): covers t rows whose first row sits at absolute position origin — the restored-boundary continuation shape.

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pub fn new_device_staged( layer_ids: Vec<usize>, hidden: usize, t: usize, ) -> HcTapSink

Device-staged sink (doc on Self::device_stage): the walk stages tap rows on device and the consumer drains them post-walk in one sync.

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pub fn new_device_staged_at( layer_ids: Vec<usize>, hidden: usize, t: usize, origin: usize, ) -> HcTapSink

Device-staged sink anchored at absolute position origin (lane/spec-route-depth- 20260902): one prime CHUNK’s tap rows, staged on the writing engine’s device, drained by the chunked drafter prime right after that chunk’s walk. The host rows Vec is left EMPTY on purpose (nothing reads it; the eager sink’s per-prompt host Vec is the 21 GB-at-256k cost this constructor exists to avoid).

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