pub struct RegisterBlock { /* private fields */ }Expand description
Register block
Implementations§
Source§impl RegisterBlock
impl RegisterBlock
Sourcepub const fn mrcc_glb_rst0(&self) -> &MrccGlbRst0
pub const fn mrcc_glb_rst0(&self) -> &MrccGlbRst0
0x00 - Peripheral Reset Control 0
Sourcepub const fn mrcc_glb_rst0_set(&self) -> &MrccGlbRst0Set
pub const fn mrcc_glb_rst0_set(&self) -> &MrccGlbRst0Set
0x04 - Peripheral Reset Control Set 0
Sourcepub const fn mrcc_glb_rst0_clr(&self) -> &MrccGlbRst0Clr
pub const fn mrcc_glb_rst0_clr(&self) -> &MrccGlbRst0Clr
0x08 - Peripheral Reset Control Clear 0
Sourcepub const fn mrcc_glb_rst1(&self) -> &MrccGlbRst1
pub const fn mrcc_glb_rst1(&self) -> &MrccGlbRst1
0x10 - Peripheral Reset Control 1
Sourcepub const fn mrcc_glb_rst1_set(&self) -> &MrccGlbRst1Set
pub const fn mrcc_glb_rst1_set(&self) -> &MrccGlbRst1Set
0x14 - Peripheral Reset Control Set 1
Sourcepub const fn mrcc_glb_rst1_clr(&self) -> &MrccGlbRst1Clr
pub const fn mrcc_glb_rst1_clr(&self) -> &MrccGlbRst1Clr
0x18 - Peripheral Reset Control Clear 1
Sourcepub const fn mrcc_glb_rst2(&self) -> &MrccGlbRst2
pub const fn mrcc_glb_rst2(&self) -> &MrccGlbRst2
0x20 - Peripheral Reset Control 2
Sourcepub const fn mrcc_glb_rst2_set(&self) -> &MrccGlbRst2Set
pub const fn mrcc_glb_rst2_set(&self) -> &MrccGlbRst2Set
0x24 - Peripheral Reset Control Set 2
Sourcepub const fn mrcc_glb_rst2_clr(&self) -> &MrccGlbRst2Clr
pub const fn mrcc_glb_rst2_clr(&self) -> &MrccGlbRst2Clr
0x28 - Peripheral Reset Control Clear 2
Sourcepub const fn mrcc_glb_cc0(&self) -> &MrccGlbCc0
pub const fn mrcc_glb_cc0(&self) -> &MrccGlbCc0
0x40 - AHB Clock Control 0
Sourcepub const fn mrcc_glb_cc0_set(&self) -> &MrccGlbCc0Set
pub const fn mrcc_glb_cc0_set(&self) -> &MrccGlbCc0Set
0x44 - AHB Clock Control Set 0
Sourcepub const fn mrcc_glb_cc0_clr(&self) -> &MrccGlbCc0Clr
pub const fn mrcc_glb_cc0_clr(&self) -> &MrccGlbCc0Clr
0x48 - AHB Clock Control Clear 0
Sourcepub const fn mrcc_glb_cc1(&self) -> &MrccGlbCc1
pub const fn mrcc_glb_cc1(&self) -> &MrccGlbCc1
0x50 - AHB Clock Control 1
Sourcepub const fn mrcc_glb_cc1_set(&self) -> &MrccGlbCc1Set
pub const fn mrcc_glb_cc1_set(&self) -> &MrccGlbCc1Set
0x54 - AHB Clock Control Set 1
Sourcepub const fn mrcc_glb_cc1_clr(&self) -> &MrccGlbCc1Clr
pub const fn mrcc_glb_cc1_clr(&self) -> &MrccGlbCc1Clr
0x58 - AHB Clock Control Clear 1
Sourcepub const fn mrcc_glb_cc2(&self) -> &MrccGlbCc2
pub const fn mrcc_glb_cc2(&self) -> &MrccGlbCc2
0x60 - AHB Clock Control 2
Sourcepub const fn mrcc_glb_cc2_set(&self) -> &MrccGlbCc2Set
pub const fn mrcc_glb_cc2_set(&self) -> &MrccGlbCc2Set
0x64 - AHB Clock Control Set 2
Sourcepub const fn mrcc_glb_cc2_clr(&self) -> &MrccGlbCc2Clr
pub const fn mrcc_glb_cc2_clr(&self) -> &MrccGlbCc2Clr
0x68 - AHB Clock Control Clear 2
Sourcepub const fn mrcc_glb_acc0(&self) -> &MrccGlbAcc0
pub const fn mrcc_glb_acc0(&self) -> &MrccGlbAcc0
0x80 - Control Automatic Clock Gating 0
Sourcepub const fn mrcc_glb_acc1(&self) -> &MrccGlbAcc1
pub const fn mrcc_glb_acc1(&self) -> &MrccGlbAcc1
0x84 - Control Automatic Clock Gating 1
Sourcepub const fn mrcc_glb_acc2(&self) -> &MrccGlbAcc2
pub const fn mrcc_glb_acc2(&self) -> &MrccGlbAcc2
0x88 - Control Automatic Clock Gating 2
Sourcepub const fn mrcc_i3c0_fclk_clksel(&self) -> &MrccI3c0FclkClksel
pub const fn mrcc_i3c0_fclk_clksel(&self) -> &MrccI3c0FclkClksel
0xa0 - I3C0_FCLK clock selection control
Sourcepub const fn mrcc_i3c0_fclk_clkdiv(&self) -> &MrccI3c0FclkClkdiv
pub const fn mrcc_i3c0_fclk_clkdiv(&self) -> &MrccI3c0FclkClkdiv
0xa4 - I3C0_FCLK clock divider control
Sourcepub const fn mrcc_ctimer0_clksel(&self) -> &MrccCtimer0Clksel
pub const fn mrcc_ctimer0_clksel(&self) -> &MrccCtimer0Clksel
0xa8 - CTIMER0 clock selection control
Sourcepub const fn mrcc_ctimer0_clkdiv(&self) -> &MrccCtimer0Clkdiv
pub const fn mrcc_ctimer0_clkdiv(&self) -> &MrccCtimer0Clkdiv
0xac - CTIMER0 clock divider control
Sourcepub const fn mrcc_ctimer1_clksel(&self) -> &MrccCtimer1Clksel
pub const fn mrcc_ctimer1_clksel(&self) -> &MrccCtimer1Clksel
0xb0 - CTIMER1 clock selection control
Sourcepub const fn mrcc_ctimer1_clkdiv(&self) -> &MrccCtimer1Clkdiv
pub const fn mrcc_ctimer1_clkdiv(&self) -> &MrccCtimer1Clkdiv
0xb4 - CTIMER1 clock divider control
Sourcepub const fn mrcc_ctimer2_clksel(&self) -> &MrccCtimer2Clksel
pub const fn mrcc_ctimer2_clksel(&self) -> &MrccCtimer2Clksel
0xb8 - CTIMER2 clock selection control
Sourcepub const fn mrcc_ctimer2_clkdiv(&self) -> &MrccCtimer2Clkdiv
pub const fn mrcc_ctimer2_clkdiv(&self) -> &MrccCtimer2Clkdiv
0xbc - CTIMER2 clock divider control
Sourcepub const fn mrcc_ctimer3_clksel(&self) -> &MrccCtimer3Clksel
pub const fn mrcc_ctimer3_clksel(&self) -> &MrccCtimer3Clksel
0xc0 - CTIMER3 clock selection control
Sourcepub const fn mrcc_ctimer3_clkdiv(&self) -> &MrccCtimer3Clkdiv
pub const fn mrcc_ctimer3_clkdiv(&self) -> &MrccCtimer3Clkdiv
0xc4 - CTIMER3 clock divider control
Sourcepub const fn mrcc_ctimer4_clksel(&self) -> &MrccCtimer4Clksel
pub const fn mrcc_ctimer4_clksel(&self) -> &MrccCtimer4Clksel
0xc8 - CTIMER4 clock selection control
Sourcepub const fn mrcc_ctimer4_clkdiv(&self) -> &MrccCtimer4Clkdiv
pub const fn mrcc_ctimer4_clkdiv(&self) -> &MrccCtimer4Clkdiv
0xcc - CTIMER4 clock divider control
Sourcepub const fn mrcc_wwdt0_clkdiv(&self) -> &MrccWwdt0Clkdiv
pub const fn mrcc_wwdt0_clkdiv(&self) -> &MrccWwdt0Clkdiv
0xd4 - WWDT0 clock divider control
Sourcepub const fn mrcc_flexio0_clksel(&self) -> &MrccFlexio0Clksel
pub const fn mrcc_flexio0_clksel(&self) -> &MrccFlexio0Clksel
0xd8 - FLEXIO0 clock selection control
Sourcepub const fn mrcc_flexio0_clkdiv(&self) -> &MrccFlexio0Clkdiv
pub const fn mrcc_flexio0_clkdiv(&self) -> &MrccFlexio0Clkdiv
0xdc - FLEXIO0 clock divider control
Sourcepub const fn mrcc_lpi2c0_clksel(&self) -> &MrccLpi2c0Clksel
pub const fn mrcc_lpi2c0_clksel(&self) -> &MrccLpi2c0Clksel
0xe0 - LPI2C0 clock selection control
Sourcepub const fn mrcc_lpi2c0_clkdiv(&self) -> &MrccLpi2c0Clkdiv
pub const fn mrcc_lpi2c0_clkdiv(&self) -> &MrccLpi2c0Clkdiv
0xe4 - LPI2C0 clock divider control
Sourcepub const fn mrcc_lpi2c1_clksel(&self) -> &MrccLpi2c1Clksel
pub const fn mrcc_lpi2c1_clksel(&self) -> &MrccLpi2c1Clksel
0xe8 - LPI2C1 clock selection control
Sourcepub const fn mrcc_lpi2c1_clkdiv(&self) -> &MrccLpi2c1Clkdiv
pub const fn mrcc_lpi2c1_clkdiv(&self) -> &MrccLpi2c1Clkdiv
0xec - LPI2C1 clock divider control
Sourcepub const fn mrcc_lpspi0_clksel(&self) -> &MrccLpspi0Clksel
pub const fn mrcc_lpspi0_clksel(&self) -> &MrccLpspi0Clksel
0xf0 - LPSPI0 clock selection control
Sourcepub const fn mrcc_lpspi0_clkdiv(&self) -> &MrccLpspi0Clkdiv
pub const fn mrcc_lpspi0_clkdiv(&self) -> &MrccLpspi0Clkdiv
0xf4 - LPSPI0 clock divider control
Sourcepub const fn mrcc_lpspi1_clksel(&self) -> &MrccLpspi1Clksel
pub const fn mrcc_lpspi1_clksel(&self) -> &MrccLpspi1Clksel
0xf8 - LPSPI1 clock selection control
Sourcepub const fn mrcc_lpspi1_clkdiv(&self) -> &MrccLpspi1Clkdiv
pub const fn mrcc_lpspi1_clkdiv(&self) -> &MrccLpspi1Clkdiv
0xfc - LPSPI1 clock divider control
Sourcepub const fn mrcc_lpuart0_clksel(&self) -> &MrccLpuart0Clksel
pub const fn mrcc_lpuart0_clksel(&self) -> &MrccLpuart0Clksel
0x100 - LPUART0 clock selection control
Sourcepub const fn mrcc_lpuart0_clkdiv(&self) -> &MrccLpuart0Clkdiv
pub const fn mrcc_lpuart0_clkdiv(&self) -> &MrccLpuart0Clkdiv
0x104 - LPUART0 clock divider control
Sourcepub const fn mrcc_lpuart1_clksel(&self) -> &MrccLpuart1Clksel
pub const fn mrcc_lpuart1_clksel(&self) -> &MrccLpuart1Clksel
0x108 - LPUART1 clock selection control
Sourcepub const fn mrcc_lpuart1_clkdiv(&self) -> &MrccLpuart1Clkdiv
pub const fn mrcc_lpuart1_clkdiv(&self) -> &MrccLpuart1Clkdiv
0x10c - LPUART1 clock divider control
Sourcepub const fn mrcc_lpuart2_clksel(&self) -> &MrccLpuart2Clksel
pub const fn mrcc_lpuart2_clksel(&self) -> &MrccLpuart2Clksel
0x110 - LPUART2 clock selection control
Sourcepub const fn mrcc_lpuart2_clkdiv(&self) -> &MrccLpuart2Clkdiv
pub const fn mrcc_lpuart2_clkdiv(&self) -> &MrccLpuart2Clkdiv
0x114 - LPUART2 clock divider control
Sourcepub const fn mrcc_lpuart3_clksel(&self) -> &MrccLpuart3Clksel
pub const fn mrcc_lpuart3_clksel(&self) -> &MrccLpuart3Clksel
0x118 - LPUART3 clock selection control
Sourcepub const fn mrcc_lpuart3_clkdiv(&self) -> &MrccLpuart3Clkdiv
pub const fn mrcc_lpuart3_clkdiv(&self) -> &MrccLpuart3Clkdiv
0x11c - LPUART3 clock divider control
Sourcepub const fn mrcc_lpuart4_clksel(&self) -> &MrccLpuart4Clksel
pub const fn mrcc_lpuart4_clksel(&self) -> &MrccLpuart4Clksel
0x120 - LPUART4 clock selection control
Sourcepub const fn mrcc_lpuart4_clkdiv(&self) -> &MrccLpuart4Clkdiv
pub const fn mrcc_lpuart4_clkdiv(&self) -> &MrccLpuart4Clkdiv
0x124 - LPUART4 clock divider control
Sourcepub const fn mrcc_usb0_clksel(&self) -> &MrccUsb0Clksel
pub const fn mrcc_usb0_clksel(&self) -> &MrccUsb0Clksel
0x128 - USB0 clock selection control
Sourcepub const fn mrcc_usb0_clkdiv(&self) -> &MrccUsb0Clkdiv
pub const fn mrcc_usb0_clkdiv(&self) -> &MrccUsb0Clkdiv
0x12c - USB0 clock divider control
Sourcepub const fn mrcc_lptmr0_clksel(&self) -> &MrccLptmr0Clksel
pub const fn mrcc_lptmr0_clksel(&self) -> &MrccLptmr0Clksel
0x130 - LPTMR0 clock selection control
Sourcepub const fn mrcc_lptmr0_clkdiv(&self) -> &MrccLptmr0Clkdiv
pub const fn mrcc_lptmr0_clkdiv(&self) -> &MrccLptmr0Clkdiv
0x134 - LPTMR0 clock divider control
Sourcepub const fn mrcc_ostimer0_clksel(&self) -> &MrccOstimer0Clksel
pub const fn mrcc_ostimer0_clksel(&self) -> &MrccOstimer0Clksel
0x138 - OSTIMER0 clock selection control
Sourcepub const fn mrcc_adc_clksel(&self) -> &MrccAdcClksel
pub const fn mrcc_adc_clksel(&self) -> &MrccAdcClksel
0x140 - ADCx clock selection control
Sourcepub const fn mrcc_adc_clkdiv(&self) -> &MrccAdcClkdiv
pub const fn mrcc_adc_clkdiv(&self) -> &MrccAdcClkdiv
0x144 - ADCx clock divider control
Sourcepub const fn mrcc_cmp0_func_clkdiv(&self) -> &MrccCmp0FuncClkdiv
pub const fn mrcc_cmp0_func_clkdiv(&self) -> &MrccCmp0FuncClkdiv
0x14c - CMP0_FUNC clock divider control
Sourcepub const fn mrcc_cmp0_rr_clksel(&self) -> &MrccCmp0RrClksel
pub const fn mrcc_cmp0_rr_clksel(&self) -> &MrccCmp0RrClksel
0x150 - CMP0_RR clock selection control
Sourcepub const fn mrcc_cmp0_rr_clkdiv(&self) -> &MrccCmp0RrClkdiv
pub const fn mrcc_cmp0_rr_clkdiv(&self) -> &MrccCmp0RrClkdiv
0x154 - CMP0_RR clock divider control
Sourcepub const fn mrcc_cmp1_func_clkdiv(&self) -> &MrccCmp1FuncClkdiv
pub const fn mrcc_cmp1_func_clkdiv(&self) -> &MrccCmp1FuncClkdiv
0x15c - CMP1_FUNC clock divider control
Sourcepub const fn mrcc_cmp1_rr_clksel(&self) -> &MrccCmp1RrClksel
pub const fn mrcc_cmp1_rr_clksel(&self) -> &MrccCmp1RrClksel
0x160 - CMP1_RR clock selection control
Sourcepub const fn mrcc_cmp1_rr_clkdiv(&self) -> &MrccCmp1RrClkdiv
pub const fn mrcc_cmp1_rr_clkdiv(&self) -> &MrccCmp1RrClkdiv
0x164 - CMP1_RR clock divider control
Sourcepub const fn mrcc_cmp2_func_clkdiv(&self) -> &MrccCmp2FuncClkdiv
pub const fn mrcc_cmp2_func_clkdiv(&self) -> &MrccCmp2FuncClkdiv
0x16c - CMP2_FUNC clock divider control
Sourcepub const fn mrcc_cmp2_rr_clksel(&self) -> &MrccCmp2RrClksel
pub const fn mrcc_cmp2_rr_clksel(&self) -> &MrccCmp2RrClksel
0x170 - CMP2_RR clock selection control
Sourcepub const fn mrcc_cmp2_rr_clkdiv(&self) -> &MrccCmp2RrClkdiv
pub const fn mrcc_cmp2_rr_clkdiv(&self) -> &MrccCmp2RrClkdiv
0x174 - CMP2_RR clock divider control
Sourcepub const fn mrcc_dac0_clksel(&self) -> &MrccDac0Clksel
pub const fn mrcc_dac0_clksel(&self) -> &MrccDac0Clksel
0x178 - DAC0 clock selection control
Sourcepub const fn mrcc_dac0_clkdiv(&self) -> &MrccDac0Clkdiv
pub const fn mrcc_dac0_clkdiv(&self) -> &MrccDac0Clkdiv
0x17c - DAC0 clock divider control
Sourcepub const fn mrcc_flexcan0_clksel(&self) -> &MrccFlexcan0Clksel
pub const fn mrcc_flexcan0_clksel(&self) -> &MrccFlexcan0Clksel
0x180 - FLEXCAN0 clock selection control
Sourcepub const fn mrcc_flexcan0_clkdiv(&self) -> &MrccFlexcan0Clkdiv
pub const fn mrcc_flexcan0_clkdiv(&self) -> &MrccFlexcan0Clkdiv
0x184 - FLEXCAN0 clock divider control
Sourcepub const fn mrcc_flexcan1_clksel(&self) -> &MrccFlexcan1Clksel
pub const fn mrcc_flexcan1_clksel(&self) -> &MrccFlexcan1Clksel
0x188 - FLEXCAN1 clock selection control
Sourcepub const fn mrcc_flexcan1_clkdiv(&self) -> &MrccFlexcan1Clkdiv
pub const fn mrcc_flexcan1_clkdiv(&self) -> &MrccFlexcan1Clkdiv
0x18c - FLEXCAN1 clock divider control
Sourcepub const fn mrcc_lpi2c2_clksel(&self) -> &MrccLpi2c2Clksel
pub const fn mrcc_lpi2c2_clksel(&self) -> &MrccLpi2c2Clksel
0x190 - LPI2C2 clock selection control
Sourcepub const fn mrcc_lpi2c2_clkdiv(&self) -> &MrccLpi2c2Clkdiv
pub const fn mrcc_lpi2c2_clkdiv(&self) -> &MrccLpi2c2Clkdiv
0x194 - LPI2C2 clock divider control
Sourcepub const fn mrcc_lpi2c3_clksel(&self) -> &MrccLpi2c3Clksel
pub const fn mrcc_lpi2c3_clksel(&self) -> &MrccLpi2c3Clksel
0x198 - LPI2C3 clock selection control
Sourcepub const fn mrcc_lpi2c3_clkdiv(&self) -> &MrccLpi2c3Clkdiv
pub const fn mrcc_lpi2c3_clkdiv(&self) -> &MrccLpi2c3Clkdiv
0x19c - LPI2C3 clock divider control
Sourcepub const fn mrcc_lpuart5_clksel(&self) -> &MrccLpuart5Clksel
pub const fn mrcc_lpuart5_clksel(&self) -> &MrccLpuart5Clksel
0x1a0 - LPUART5 clock selection control
Sourcepub const fn mrcc_lpuart5_clkdiv(&self) -> &MrccLpuart5Clkdiv
pub const fn mrcc_lpuart5_clkdiv(&self) -> &MrccLpuart5Clkdiv
0x1a4 - LPUART5 clock divider control
Sourcepub const fn mrcc_dbg_trace_clksel(&self) -> &MrccDbgTraceClksel
pub const fn mrcc_dbg_trace_clksel(&self) -> &MrccDbgTraceClksel
0x1a8 - DBG_TRACE clock selection control
Sourcepub const fn mrcc_dbg_trace_clkdiv(&self) -> &MrccDbgTraceClkdiv
pub const fn mrcc_dbg_trace_clkdiv(&self) -> &MrccDbgTraceClkdiv
0x1ac - DBG_TRACE clock divider control
Sourcepub const fn mrcc_clkout_clksel(&self) -> &MrccClkoutClksel
pub const fn mrcc_clkout_clksel(&self) -> &MrccClkoutClksel
0x1b0 - CLKOUT clock selection control
Sourcepub const fn mrcc_clkout_clkdiv(&self) -> &MrccClkoutClkdiv
pub const fn mrcc_clkout_clkdiv(&self) -> &MrccClkoutClkdiv
0x1b4 - CLKOUT clock divider control
Sourcepub const fn mrcc_systick_clksel(&self) -> &MrccSystickClksel
pub const fn mrcc_systick_clksel(&self) -> &MrccSystickClksel
0x1b8 - SYSTICK clock selection control
Sourcepub const fn mrcc_systick_clkdiv(&self) -> &MrccSystickClkdiv
pub const fn mrcc_systick_clkdiv(&self) -> &MrccSystickClkdiv
0x1bc - SYSTICK clock divider control