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RegisterBlock

mcxa_pac::syscon

Struct RegisterBlock 

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pub struct RegisterBlock { /* private fields */ }
Expand description

Register block

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impl RegisterBlock

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pub const fn remap(&self) -> &Remap

0x200 - AHB Matrix Remap Control

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pub const fn ahbmatprio(&self) -> &Ahbmatprio

0x210 - AHB Matrix Priority Control

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pub const fn cpu0nstckcal(&self) -> &Cpu0nstckcal

0x23c - Non-Secure CPU0 System Tick Calibration

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pub const fn nmisrc(&self) -> &Nmisrc

0x248 - NMI Source Select

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pub const fn protlvl(&self) -> &Protlvl

0x24c - Protect Level Control

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pub const fn slowclkdiv(&self) -> &Slowclkdiv

0x378 - SLOW_CLK Clock Divider

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pub const fn busclkdiv(&self) -> &Busclkdiv

0x37c - BUS_CLK Clock Divider

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pub const fn ahbclkdiv(&self) -> &Ahbclkdiv

0x380 - System Clock Divider

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pub const fn frohfdiv(&self) -> &Frohfdiv

0x388 - FRO_HF_DIV Clock Divider

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pub const fn frolfdiv(&self) -> &Frolfdiv

0x38c - FRO_LF_DIV Clock Divider

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pub const fn pll1clkdiv(&self) -> &Pll1clkdiv

0x3e4 - PLL1_CLK_DIV Clock Divider

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pub const fn clkunlock(&self) -> &Clkunlock

0x3fc - Clock Configuration Unlock

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pub const fn nvm_ctrl(&self) -> &NvmCtrl

0x400 - NVM Control

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pub const fn smart_dmaint(&self) -> &SmartDmaint

0x414 - SmartDMA Interrupt Hijack

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pub const fn ram_interleave(&self) -> &RamInterleave

0x470 - Controls RAM Interleave Integration

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pub const fn cpustat(&self) -> &Cpustat

0x80c - CPU Status

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pub const fn lpcac_ctrl(&self) -> &LpcacCtrl

0x824 - LPCAC Control

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pub const fn pwm0subctl(&self) -> &Pwm0subctl

0x938 - PWM0 Submodule Control

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pub const fn pwm1subctl(&self) -> &Pwm1subctl

0x93c - PWM1 Submodule Control

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pub const fn ctimerglobalstarten(&self) -> &Ctimerglobalstarten

0x940 - CTIMER Global Start Enable

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pub const fn ram_ctrl(&self) -> &RamCtrl

0x944 - RAM Control

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pub const fn gray_code_lsb(&self) -> &GrayCodeLsb

0xb60 - Gray to Binary Converter Gray Code [31:0]

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pub const fn gray_code_msb(&self) -> &GrayCodeMsb

0xb64 - Gray to Binary Converter Gray Code [41:32]

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pub const fn binary_code_lsb(&self) -> &BinaryCodeLsb

0xb68 - Gray to Binary Converter Binary Code [31:0]

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pub const fn binary_code_msb(&self) -> &BinaryCodeMsb

0xb6c - Gray to Binary Converter Binary Code [41:32]

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pub const fn els_udf(&self) -> &ElsUdf

0xe10 - UDF Control

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pub const fn msfcfg(&self) -> &Msfcfg

0xe1c - MSF Configuration

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pub const fn els_uid(&self, n: usize) -> &ElsUid

0xe20..0xe30 - Device UID n

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pub fn els_uid_iter(&self) -> impl Iterator<Item = &ElsUid>

Iterator for array of: 0xe20..0xe30 - Device UID n

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pub const fn rop_state(&self) -> &RopState

0xe3c - ROP State Register

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pub const fn sram_xen(&self) -> &SramXen

0xe58 - RAM XEN Control

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pub const fn sram_xen_dp(&self) -> &SramXenDp

0xe5c - RAM XEN Control (Duplicate)

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pub const fn els_otp_lc_state(&self) -> &ElsOtpLcState

0xe80 - Life Cycle State Register

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pub const fn els_otp_lc_state_dp(&self) -> &ElsOtpLcStateDp

0xe84 - Life Cycle State Register (Duplicate)

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pub const fn debug_lock_en(&self) -> &DebugLockEn

0xfa0 - Control Write Access to Security

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pub const fn debug_features(&self) -> &DebugFeatures

0xfa4 - Cortex Debug Features Control

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pub const fn debug_features_dp(&self) -> &DebugFeaturesDp

0xfa8 - Cortex Debug Features Control (Duplicate)

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pub const fn swd_access_cpu0(&self) -> &SwdAccessCpu0

0xfb4 - CPU0 Software Debug Access

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pub const fn debug_auth_beacon(&self) -> &DebugAuthBeacon

0xfc0 - Debug Authentication BEACON

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pub const fn jtag_id(&self) -> &JtagId

0xff0 - JTAG Chip ID

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pub const fn device_type(&self) -> &DeviceType

0xff4 - Device Type

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pub const fn device_id0(&self) -> &DeviceId0

0xff8 - Device ID

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pub const fn dieid(&self) -> &Dieid

0xffc - Chip Revision ID and Number

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