Enum Interrupt 

#[repr(u16)]
pub enum Interrupt {
    Reserved16 = 0,
    CMC = 1,
    DMA_CH0 = 2,
    DMA_CH1 = 3,
    DMA_CH2 = 4,
    DMA_CH3 = 5,
    DMA_CH4 = 6,
    DMA_CH5 = 7,
    DMA_CH6 = 8,
    DMA_CH7 = 9,
    ERM0_SINGLE_BIT = 10,
    ERM0_MULTI_BIT = 11,
    FMU0 = 12,
    GLIKEY0 = 13,
    MBC0 = 14,
    SCG0 = 15,
    SPC0 = 16,
    TDET = 17,
    WUU0 = 18,
    CAN0 = 19,
    CAN1 = 20,
    FLEXIO = 23,
    I3C0 = 24,
    LPI2C0 = 26,
    LPI2C1 = 27,
    LPSPI0 = 28,
    LPSPI1 = 29,
    LPUART0 = 31,
    LPUART1 = 32,
    LPUART2 = 33,
    LPUART3 = 34,
    LPUART4 = 35,
    USB0 = 36,
    CDOG0 = 38,
    CTIMER0 = 39,
    CTIMER1 = 40,
    CTIMER2 = 41,
    CTIMER3 = 42,
    CTIMER4 = 43,
    FLEXPWM0_RELOAD_ERROR = 44,
    FLEXPWM0_FAULT = 45,
    FLEXPWM0_SUBMODULE0 = 46,
    FLEXPWM0_SUBMODULE1 = 47,
    FLEXPWM0_SUBMODULE2 = 48,
    FLEXPWM0_SUBMODULE3 = 49,
    EQDC0_COMPARE = 50,
    EQDC0_HOME = 51,
    EQDC0_WATCHDOG = 52,
    EQDC0_INDEX = 53,
    FREQME0 = 54,
    LPTMR0 = 55,
    OS_EVENT = 57,
    WAKETIMER0 = 58,
    UTICK0 = 59,
    WWDT0 = 60,
    ADC0 = 62,
    ADC1 = 63,
    CMP0 = 64,
    CMP1 = 65,
    CMP2 = 66,
    DAC0 = 67,
    GPIO0 = 71,
    GPIO1 = 72,
    GPIO2 = 73,
    GPIO3 = 74,
    GPIO4 = 75,
    LPI2C2 = 77,
    LPI2C3 = 78,
    FLEXPWM1_RELOAD_ERROR = 79,
    FLEXPWM1_FAULT = 80,
    FLEXPWM1_SUBMODULE0 = 81,
    FLEXPWM1_SUBMODULE1 = 82,
    FLEXPWM1_SUBMODULE2 = 83,
    FLEXPWM1_SUBMODULE3 = 84,
    EQDC1_COMPARE = 85,
    EQDC1_HOME = 86,
    EQDC1_WATCHDOG = 87,
    EQDC1_INDEX = 88,
    LPUART5 = 95,
    MAU = 107,
    SMARTDMA = 108,
    CDOG1 = 109,
    PKC = 110,
    SGI = 111,
    TRNG0 = 113,
    ADC2 = 116,
    ADC3 = 117,
    RTC = 119,
    RTC_1HZ = 120,
    SLCD = 121,
}

Enumeration of all the interrupts.

Variants

Reserved16 = 0

0 - Reserved16

CMC = 1

1 - CMC

DMA_CH0 = 2

2 - DMA_CH0

DMA_CH1 = 3

3 - DMA_CH1

DMA_CH2 = 4

4 - DMA_CH2

DMA_CH3 = 5

5 - DMA_CH3

DMA_CH4 = 6

6 - DMA_CH4

DMA_CH5 = 7

7 - DMA_CH5

DMA_CH6 = 8

8 - DMA_CH6

DMA_CH7 = 9

9 - DMA_CH7

ERM0_SINGLE_BIT = 10

10 - ERM0_SINGLE_BIT

ERM0_MULTI_BIT = 11

11 - ERM0_MULTI_BIT

FMU0 = 12

12 - FMU0

GLIKEY0 = 13

13 - GLIKEY0

MBC0 = 14

14 - MBC0

SCG0 = 15

15 - SCG0

SPC0 = 16

16 - SPC0

TDET = 17

17 - TDET

WUU0 = 18

18 - WUU0

CAN0 = 19

19 - CAN0

CAN1 = 20

20 - CAN1

FLEXIO = 23

23 - FLEXIO

I3C0 = 24

24 - I3C0

LPI2C0 = 26

26 - LPI2C0

LPI2C1 = 27

27 - LPI2C1

LPSPI0 = 28

28 - LPSPI0

LPSPI1 = 29

29 - LPSPI1

LPUART0 = 31

31 - LPUART0

LPUART1 = 32

32 - LPUART1

LPUART2 = 33

33 - LPUART2

LPUART3 = 34

34 - LPUART3

LPUART4 = 35

35 - LPUART4

USB0 = 36

36 - USB0

CDOG0 = 38

38 - CDOG0

CTIMER0 = 39

39 - CTIMER0

CTIMER1 = 40

40 - CTIMER1

CTIMER2 = 41

41 - CTIMER2

CTIMER3 = 42

42 - CTIMER3

CTIMER4 = 43

43 - CTIMER4

FLEXPWM0_RELOAD_ERROR = 44

44 - FLEXPWM0_RELOAD_ERROR

FLEXPWM0_FAULT = 45

45 - FLEXPWM0_FAULT

FLEXPWM0_SUBMODULE0 = 46

46 - FLEXPWM0_SUBMODULE0

FLEXPWM0_SUBMODULE1 = 47

47 - FLEXPWM0_SUBMODULE1

FLEXPWM0_SUBMODULE2 = 48

48 - FLEXPWM0_SUBMODULE2

FLEXPWM0_SUBMODULE3 = 49

49 - FLEXPWM0_SUBMODULE3

EQDC0_COMPARE = 50

50 - EQDC0_COMPARE

EQDC0_HOME = 51

51 - EQDC0_HOME

EQDC0_WATCHDOG = 52

52 - EQDC0_WATCHDOG

EQDC0_INDEX = 53

53 - EQDC0_INDEX

FREQME0 = 54

54 - FREQME0

LPTMR0 = 55

55 - LPTMR0

OS_EVENT = 57

57 - OS_EVENT

WAKETIMER0 = 58

58 - WAKETIMER0

UTICK0 = 59

59 - UTICK0

WWDT0 = 60

60 - WWDT0

ADC0 = 62

62 - ADC0

ADC1 = 63

63 - ADC1

CMP0 = 64

64 - CMP0

CMP1 = 65

65 - CMP1

CMP2 = 66

66 - CMP2

DAC0 = 67

67 - DAC0

GPIO0 = 71

71 - GPIO0

GPIO1 = 72

72 - GPIO1

GPIO2 = 73

73 - GPIO2

GPIO3 = 74

74 - GPIO3

GPIO4 = 75

75 - GPIO4

LPI2C2 = 77

77 - LPI2C2

LPI2C3 = 78

78 - LPI2C3

FLEXPWM1_RELOAD_ERROR = 79

79 - FLEXPWM1_RELOAD_ERROR

FLEXPWM1_FAULT = 80

80 - FLEXPWM1_FAULT

FLEXPWM1_SUBMODULE0 = 81

81 - FLEXPWM1_SUBMODULE0

FLEXPWM1_SUBMODULE1 = 82

82 - FLEXPWM1_SUBMODULE1

FLEXPWM1_SUBMODULE2 = 83

83 - FLEXPWM1_SUBMODULE2

FLEXPWM1_SUBMODULE3 = 84

84 - FLEXPWM1_SUBMODULE3

EQDC1_COMPARE = 85

85 - EQDC1_COMPARE

EQDC1_HOME = 86

86 - EQDC1_HOME

EQDC1_WATCHDOG = 87

87 - EQDC1_WATCHDOG

EQDC1_INDEX = 88

88 - EQDC1_INDEX

LPUART5 = 95

95 - LPUART5

MAU = 107

107 - MAU

SMARTDMA = 108

108 - SMARTDMA

CDOG1 = 109

109 - CDOG1

PKC = 110

110 - PKC

SGI = 111

111 - SGI

TRNG0 = 113

113 - TRNG0

ADC2 = 116

116 - ADC2

ADC3 = 117

117 - ADC3

RTC = 119

119 - RTC

RTC_1HZ = 120

120 - RTC_1HZ

SLCD = 121

121 - SLCD

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl InterruptNumber for Interrupt

fn number(self) -> u16

Return the interrupt number associated with this variant.

impl PartialEq for Interrupt

fn eq(&self, other: &Interrupt) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralPartialEq for Interrupt