Type Alias W 

pub type W = W<CtrlSpec>;

Register CTRL writer

Aliased Type

pub struct W { /* private fields */ }

Implementations

impl W

pub fn rx_thd_val(&mut self) -> RxThdValW<'_, CtrlSpec>

Bits 0:3 - This field specifies the depth of receive FIFO for interrupt generation (value 0 and > 16 are ignored)

pub fn par_en(&mut self) -> ParEnW<'_, CtrlSpec>

Bit 4 - Parity Enable

pub fn par_eo(&mut self) -> ParEoW<'_, CtrlSpec>

Bit 5 - when PAREN=1 selects odd or even parity odd is 1 even is 0

pub fn par_md(&mut self) -> ParMdW<'_, CtrlSpec>

Bit 6 - Selects parity based on 1s or 0s count (when PAREN=1)

pub fn cts_dis(&mut self) -> CtsDisW<'_, CtrlSpec>

Bit 7 - CTS Sampling Disable

pub fn tx_flush(&mut self) -> TxFlushW<'_, CtrlSpec>

Bit 8 - Flushes the TX FIFO buffer. This bit is automatically cleared by hardware when flush is completed.

pub fn rx_flush(&mut self) -> RxFlushW<'_, CtrlSpec>

Bit 9 - Flushes the RX FIFO buffer. This bit is automatically cleared by hardware when flush is completed.

pub fn char_size(&mut self) -> CharSizeW<'_, CtrlSpec>

Bits 10:11 - Selects UART character size

pub fn stopbits(&mut self) -> StopbitsW<'_, CtrlSpec>

Bit 12 - Selects the number of stop bits that will be generated

pub fn hfc_en(&mut self) -> HfcEnW<'_, CtrlSpec>

Bit 13 - Enables/disables hardware flow control

pub fn rtsdc(&mut self) -> RtsdcW<'_, CtrlSpec>

Bit 14 - Hardware Flow Control RTS Mode

pub fn bclken(&mut self) -> BclkenW<'_, CtrlSpec>

Bit 15 - Baud clock enable

pub fn bclksrc(&mut self) -> BclksrcW<'_, CtrlSpec>

Bits 16:17 - To select the UART clock source for the UART engine (except APB registers). Secondary clock (used for baud rate generator) can be asynchronous from APB clock.

pub fn dpfe_en(&mut self) -> DpfeEnW<'_, CtrlSpec>

Bit 18 - Data/Parity bit frame error detection enable

pub fn bclkrdy(&mut self) -> BclkrdyW<'_, CtrlSpec>

Bit 19 - Baud clock Ready read only bit

pub fn ucagm(&mut self) -> UcagmW<'_, CtrlSpec>

Bit 20 - UART Clock Auto Gating mode

pub fn fdm(&mut self) -> FdmW<'_, CtrlSpec>

Bit 21 - Fractional Division Mode

pub fn desm(&mut self) -> DesmW<'_, CtrlSpec>

Bit 22 - RX Dual Edge Sampling Mode