Type Alias W 

pub type W = W<CtrlSpec>;

Register CTRL writer

Aliased Type

pub struct W { /* private fields */ }

Implementations

impl W

pub fn en(&mut self) -> EnW<'_, CtrlSpec>

Bit 0 - Real Time Clock Enable. This bit enables the Real Time Clock. This bit can only be written when WE=1 and BUSY =0. Change to this bit is effective only after BUSY is cleared from 1 to 0.

pub fn tod_alarm_ie(&mut self) -> TodAlarmIeW<'_, CtrlSpec>

Bit 1 - Alarm Time-of-Day Interrupt Enable. Change to this bit is effective only after BUSY is cleared from 1 to 0.

pub fn ssec_alarm_ie(&mut self) -> SsecAlarmIeW<'_, CtrlSpec>

Bit 2 - Alarm Sub-second Interrupt Enable. Change to this bit is effective only after BUSY is cleared from 1 to 0.

pub fn rdy(&mut self) -> RdyW<'_, CtrlSpec>

Bit 4 - RTC Ready. This bit is set to 1 by hardware when the RTC count registers update. It can be cleared to 0 by software at any time. It will also be cleared to 0 by hardware just prior to an update of the RTC count register.

pub fn rdy_ie(&mut self) -> RdyIeW<'_, CtrlSpec>

Bit 5 - RTC Ready Interrupt Enable.

pub fn sqw_en(&mut self) -> SqwEnW<'_, CtrlSpec>

Bit 8 - Square Wave Output Enable.

pub fn sqw_sel(&mut self) -> SqwSelW<'_, CtrlSpec>

Bits 9:10 - Frequency Output Selection. When SQE=1, these bits specify the output frequency on the SQW pin.

pub fn rd_en(&mut self) -> RdEnW<'_, CtrlSpec>

Bit 14 - Asynchronous Counter Read Enable.

pub fn wr_en(&mut self) -> WrEnW<'_, CtrlSpec>

Bit 15 - Write Enable. This register bit serves as a protection mechanism against unintentional writes to critical RTC bits.