Struct lpc845_pac::adc0::flags::SEQB_INT_R [−][src]
pub struct SEQB_INT_R(_);
Expand description
Field SEQB_INT
reader - Sequence A interrupt/DMA trigger. If the MODE bit in the SEQB_CTRL register is 0, this flag will mirror the DATAVALID bit in the sequence A global data register (SEQB_GDAT), which is set at the end of every ADC conversion performed as part of sequence B. It will be cleared automatically when the SEQB_GDAT register is read. If the MODE bit in the SEQB_CTRL register is 1, this flag will be set upon completion of an entire B sequence. In this case it must be cleared by writing a 1 to this SEQB_INT bit. This interrupt must be enabled in the INTEN register.
Methods from Deref<Target = FieldReader<bool, bool>>
Returns true
if the bit is clear (0).
Returns true
if the bit is set (1).