Struct lpc845_pac::sct0::ctrl::HALT_L_R [−][src]
pub struct HALT_L_R(_);
Expand description
Field HALT_L
reader - When this bit is 1, the L or unified counter does not run and no events can occur. A reset sets this bit. When the HALT_L bit is one, the STOP_L bit is cleared. It is possible to remove the halt condition while keeping the SCT in the stop condition (not running) with a single write to this register to simultaneously clear the HALT bit and set the STOP bit. Once set, only software can clear this bit to restore counter operation. This bit is set on reset.
Methods from Deref<Target = FieldReader<bool, bool>>
Returns true
if the bit is clear (0).
Returns true
if the bit is set (1).