Enum lpc845_pac::iocon::pio0_22::CLK_DIV_A [−][src]
#[repr(u8)]
pub enum CLK_DIV_A {
CLK_DIV_0,
CLK_DIV_1,
CLK_DIV_2,
CLK_DIV_3,
CLK_DIV_4,
CLK_DIV_5,
CLK_DIV_6,
}
Expand description
Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved.
Value on reset: 0
Variants
0: IOCONCLKDIV0
1: IOCONCLKDIV1
2: IOCONCLKDIV2
3: IOCONCLKDIV3
4: IOCONCLKDIV4
5: IOCONCLKDIV5
6: IOCONCLKDIV6