Enum FDIV_A 

#[repr(u8)]
pub enum FDIV_A {
    FDIV_0 = 0,
    FDIV_1 = 1,
    FDIV_2 = 2,
    FDIV_3 = 3,
    FDIV_4 = 4,
    FDIV_5 = 5,
    FDIV_7 = 7,
    FDIV_8 = 8,
    FDIV_9 = 9,
    FDIV_10 = 10,
    FDIV_11 = 11,
    FDIV_12 = 12,
    FDIV_13 = 13,
    FDIV_14 = 14,
    FDIV_15 = 15,
}

Functional clock divider, or 0 if no divide. The term “clocks” in this spec then refer to divided clocks. For a 12MHz input (e.g. FRO 12MHz), this would normally be set to generate a 4MHz output (so, 2). For a 1MHz input, it should be 0. Note for internal use: this does not produce a 50/50 duty cycle when non even divide.

Value on reset: 0

Variants

FDIV_0 = 0

0: No divide

FDIV_1 = 1

1: /2

FDIV_2 = 2

2: /3

FDIV_3 = 3

3: /4

FDIV_4 = 4

4: /5

FDIV_5 = 5

5: /6

FDIV_7 = 7

7: /(FDIV+1)

FDIV_8 = 8

8: /(FDIV+1)

FDIV_9 = 9

9: /(FDIV+1)

FDIV_10 = 10

10: /(FDIV+1)

FDIV_11 = 11

11: /(FDIV+1)

FDIV_12 = 12

12: /(FDIV+1)

FDIV_13 = 13

13: /(FDIV+1)

FDIV_14 = 14

14: /(FDIV+1)

FDIV_15 = 15

15: /(FDIV+1)

Trait Implementations

impl Clone for FDIV_A

fn clone(&self) -> FDIV_A

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for FDIV_A

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl From<FDIV_A> for u8

fn from(variant: FDIV_A) -> Self

Converts to this type from the input type.

impl PartialEq for FDIV_A

fn eq(&self, other: &FDIV_A) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for FDIV_A

impl StructuralPartialEq for FDIV_A