Struct lpc845_pac::iocon::pio0_28::CLK_DIV_R [−][src]
pub struct CLK_DIV_R(_);
Expand description
Field CLK_DIV
reader - Select peripheral clock divider for input filter sampling clock. Value 0x7 is reserved.
Implementations
Checks if the value of the field is CLK_DIV_0
Checks if the value of the field is CLK_DIV_1
Checks if the value of the field is CLK_DIV_2
Checks if the value of the field is CLK_DIV_3
Checks if the value of the field is CLK_DIV_4
Checks if the value of the field is CLK_DIV_5
Checks if the value of the field is CLK_DIV_6
Methods from Deref<Target = FieldReader<u8, CLK_DIV_A>>
Returns true
if the bit is clear (0).
Returns true
if the bit is set (1).