Struct lpc845_pac::capt::ctrl::W [−][src]
pub struct W(_);
Expand description
Register CTRL
writer
Implementations
Bits 0:1 - Mode of operation. May only change from 0 to another value. So, if 2 or 3, must be changed to 0 1st. Any attempt to go from non-0 to non-0 will result in 0 anyway.
Bits 2:3 - Selects type of Touch arrangement to use and so how to handle XPINSEL bits
Bit 4 - This selects what is being used as the trigger
Bit 5 - If 0, the block will continue its X based measurements, even if the TOUCH register has not been read (and so could OVERRUN). If 1, it will wait until read when a touch (TOUCH’s ISTOUCH bit is set) before starting the next. This should not normally be needed.
Bits 6:7 - If not 0, will use the DMA to read out touch events from TOUCH register. The values are shown below. This may be changed while active.
Bits 8:11 - Functional clock divider, or 0 if no divide. The term “clocks” in this spec then refer to divided clocks. For a 12MHz input (e.g. FRO 12MHz), this would normally be set to generate a 4MHz output (so, 2). For a 1MHz input, it should be 0. Note for internal use: this does not produce a 50/50 duty cycle when non even divide.
Bits 12:13 - Controls how X pins selected in XPINSEL are used when not active in the current polling round.
Bits 16:31 - Selects which of the X pins are to be used within the allowed pins - see XMAX in STATUS. The X pins are mapped via the IOCON (as are the YH and YL pins) to physical pads. So, this only selects which are to be used as the X half of the touch element. Note: when polling, these are “walked” (active) one at a time. When using POLLNOW, the 1 or more selected are used at the same time. Likewise, when in low-power mode, they are used at the same time (or small groups). X pads not selected by XPINSEL are kept at High-Z if they are connected to a pad. This allows using controlled sets for touch detection based on context.