1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - Configuration for shared functions."]
5 pub cfg: crate::Reg<cfg::CFG_SPEC>,
6 #[doc = "0x04 - Status register for Master, Slave, and Monitor functions."]
7 pub stat: crate::Reg<stat::STAT_SPEC>,
8 #[doc = "0x08 - Interrupt Enable Set and read register."]
9 pub intenset: crate::Reg<intenset::INTENSET_SPEC>,
10 #[doc = "0x0c - Interrupt Enable Clear register."]
11 pub intenclr: crate::Reg<intenclr::INTENCLR_SPEC>,
12 #[doc = "0x10 - Time-out value register."]
13 pub timeout: crate::Reg<timeout::TIMEOUT_SPEC>,
14 #[doc = "0x14 - Clock pre-divider for the entire I2C interface. This determines what time increments are used for the MSTTIME register, and controls some timing of the Slave function."]
15 pub clkdiv: crate::Reg<clkdiv::CLKDIV_SPEC>,
16 #[doc = "0x18 - Interrupt Status register for Master, Slave, and Monitor functions."]
17 pub intstat: crate::Reg<intstat::INTSTAT_SPEC>,
18 _reserved7: [u8; 0x04],
19 #[doc = "0x20 - Master control register."]
20 pub mstctl: crate::Reg<mstctl::MSTCTL_SPEC>,
21 #[doc = "0x24 - Master timing configuration."]
22 pub msttime: crate::Reg<msttime::MSTTIME_SPEC>,
23 #[doc = "0x28 - Combined Master receiver and transmitter data register."]
24 pub mstdat: crate::Reg<mstdat::MSTDAT_SPEC>,
25 _reserved10: [u8; 0x14],
26 #[doc = "0x40 - Slave control register."]
27 pub slvctl: crate::Reg<slvctl::SLVCTL_SPEC>,
28 #[doc = "0x44 - Combined Slave receiver and transmitter data register."]
29 pub slvdat: crate::Reg<slvdat::SLVDAT_SPEC>,
30 #[doc = "0x48..0x58 - Slave address register."]
31 pub slvadr: [crate::Reg<slvadr::SLVADR_SPEC>; 4],
32 #[doc = "0x58 - Slave Qualification for address 0."]
33 pub slvqual0: crate::Reg<slvqual0::SLVQUAL0_SPEC>,
34 _reserved14: [u8; 0x24],
35 #[doc = "0x80 - Monitor receiver data register."]
36 pub monrxdat: crate::Reg<monrxdat::MONRXDAT_SPEC>,
37}
38#[doc = "CFG register accessor: an alias for `Reg<CFG_SPEC>`"]
39pub type CFG = crate::Reg<cfg::CFG_SPEC>;
40#[doc = "Configuration for shared functions."]
41pub mod cfg;
42#[doc = "STAT register accessor: an alias for `Reg<STAT_SPEC>`"]
43pub type STAT = crate::Reg<stat::STAT_SPEC>;
44#[doc = "Status register for Master, Slave, and Monitor functions."]
45pub mod stat;
46#[doc = "INTENSET register accessor: an alias for `Reg<INTENSET_SPEC>`"]
47pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
48#[doc = "Interrupt Enable Set and read register."]
49pub mod intenset;
50#[doc = "INTENCLR register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
51pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
52#[doc = "Interrupt Enable Clear register."]
53pub mod intenclr;
54#[doc = "TIMEOUT register accessor: an alias for `Reg<TIMEOUT_SPEC>`"]
55pub type TIMEOUT = crate::Reg<timeout::TIMEOUT_SPEC>;
56#[doc = "Time-out value register."]
57pub mod timeout;
58#[doc = "CLKDIV register accessor: an alias for `Reg<CLKDIV_SPEC>`"]
59pub type CLKDIV = crate::Reg<clkdiv::CLKDIV_SPEC>;
60#[doc = "Clock pre-divider for the entire I2C interface. This determines what time increments are used for the MSTTIME register, and controls some timing of the Slave function."]
61pub mod clkdiv;
62#[doc = "INTSTAT register accessor: an alias for `Reg<INTSTAT_SPEC>`"]
63pub type INTSTAT = crate::Reg<intstat::INTSTAT_SPEC>;
64#[doc = "Interrupt Status register for Master, Slave, and Monitor functions."]
65pub mod intstat;
66#[doc = "MSTCTL register accessor: an alias for `Reg<MSTCTL_SPEC>`"]
67pub type MSTCTL = crate::Reg<mstctl::MSTCTL_SPEC>;
68#[doc = "Master control register."]
69pub mod mstctl;
70#[doc = "MSTTIME register accessor: an alias for `Reg<MSTTIME_SPEC>`"]
71pub type MSTTIME = crate::Reg<msttime::MSTTIME_SPEC>;
72#[doc = "Master timing configuration."]
73pub mod msttime;
74#[doc = "MSTDAT register accessor: an alias for `Reg<MSTDAT_SPEC>`"]
75pub type MSTDAT = crate::Reg<mstdat::MSTDAT_SPEC>;
76#[doc = "Combined Master receiver and transmitter data register."]
77pub mod mstdat;
78#[doc = "SLVCTL register accessor: an alias for `Reg<SLVCTL_SPEC>`"]
79pub type SLVCTL = crate::Reg<slvctl::SLVCTL_SPEC>;
80#[doc = "Slave control register."]
81pub mod slvctl;
82#[doc = "SLVDAT register accessor: an alias for `Reg<SLVDAT_SPEC>`"]
83pub type SLVDAT = crate::Reg<slvdat::SLVDAT_SPEC>;
84#[doc = "Combined Slave receiver and transmitter data register."]
85pub mod slvdat;
86#[doc = "SLVADR register accessor: an alias for `Reg<SLVADR_SPEC>`"]
87pub type SLVADR = crate::Reg<slvadr::SLVADR_SPEC>;
88#[doc = "Slave address register."]
89pub mod slvadr;
90#[doc = "SLVQUAL0 register accessor: an alias for `Reg<SLVQUAL0_SPEC>`"]
91pub type SLVQUAL0 = crate::Reg<slvqual0::SLVQUAL0_SPEC>;
92#[doc = "Slave Qualification for address 0."]
93pub mod slvqual0;
94#[doc = "MONRXDAT register accessor: an alias for `Reg<MONRXDAT_SPEC>`"]
95pub type MONRXDAT = crate::Reg<monrxdat::MONRXDAT_SPEC>;
96#[doc = "Monitor receiver data register."]
97pub mod monrxdat;