1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - Configuration for shared functions."]
pub cfg: crate::Reg<cfg::CFG_SPEC>,
#[doc = "0x04 - Status register for Master, Slave, and Monitor functions."]
pub stat: crate::Reg<stat::STAT_SPEC>,
#[doc = "0x08 - Interrupt Enable Set and read register."]
pub intenset: crate::Reg<intenset::INTENSET_SPEC>,
#[doc = "0x0c - Interrupt Enable Clear register."]
pub intenclr: crate::Reg<intenclr::INTENCLR_SPEC>,
#[doc = "0x10 - Time-out value register."]
pub timeout: crate::Reg<timeout::TIMEOUT_SPEC>,
#[doc = "0x14 - Clock pre-divider for the entire I2C interface. This determines what time increments are used for the MSTTIME register, and controls some timing of the Slave function."]
pub clkdiv: crate::Reg<clkdiv::CLKDIV_SPEC>,
#[doc = "0x18 - Interrupt Status register for Master, Slave, and Monitor functions."]
pub intstat: crate::Reg<intstat::INTSTAT_SPEC>,
_reserved7: [u8; 0x04],
#[doc = "0x20 - Master control register."]
pub mstctl: crate::Reg<mstctl::MSTCTL_SPEC>,
#[doc = "0x24 - Master timing configuration."]
pub msttime: crate::Reg<msttime::MSTTIME_SPEC>,
#[doc = "0x28 - Combined Master receiver and transmitter data register."]
pub mstdat: crate::Reg<mstdat::MSTDAT_SPEC>,
_reserved10: [u8; 0x14],
#[doc = "0x40 - Slave control register."]
pub slvctl: crate::Reg<slvctl::SLVCTL_SPEC>,
#[doc = "0x44 - Combined Slave receiver and transmitter data register."]
pub slvdat: crate::Reg<slvdat::SLVDAT_SPEC>,
#[doc = "0x48..0x58 - Slave address register."]
pub slvadr: [crate::Reg<slvadr::SLVADR_SPEC>; 4],
#[doc = "0x58 - Slave Qualification for address 0."]
pub slvqual0: crate::Reg<slvqual0::SLVQUAL0_SPEC>,
_reserved14: [u8; 0x24],
#[doc = "0x80 - Monitor receiver data register."]
pub monrxdat: crate::Reg<monrxdat::MONRXDAT_SPEC>,
}
#[doc = "CFG register accessor: an alias for `Reg<CFG_SPEC>`"]
pub type CFG = crate::Reg<cfg::CFG_SPEC>;
#[doc = "Configuration for shared functions."]
pub mod cfg;
#[doc = "STAT register accessor: an alias for `Reg<STAT_SPEC>`"]
pub type STAT = crate::Reg<stat::STAT_SPEC>;
#[doc = "Status register for Master, Slave, and Monitor functions."]
pub mod stat;
#[doc = "INTENSET register accessor: an alias for `Reg<INTENSET_SPEC>`"]
pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
#[doc = "Interrupt Enable Set and read register."]
pub mod intenset;
#[doc = "INTENCLR register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
#[doc = "Interrupt Enable Clear register."]
pub mod intenclr;
#[doc = "TIMEOUT register accessor: an alias for `Reg<TIMEOUT_SPEC>`"]
pub type TIMEOUT = crate::Reg<timeout::TIMEOUT_SPEC>;
#[doc = "Time-out value register."]
pub mod timeout;
#[doc = "CLKDIV register accessor: an alias for `Reg<CLKDIV_SPEC>`"]
pub type CLKDIV = crate::Reg<clkdiv::CLKDIV_SPEC>;
#[doc = "Clock pre-divider for the entire I2C interface. This determines what time increments are used for the MSTTIME register, and controls some timing of the Slave function."]
pub mod clkdiv;
#[doc = "INTSTAT register accessor: an alias for `Reg<INTSTAT_SPEC>`"]
pub type INTSTAT = crate::Reg<intstat::INTSTAT_SPEC>;
#[doc = "Interrupt Status register for Master, Slave, and Monitor functions."]
pub mod intstat;
#[doc = "MSTCTL register accessor: an alias for `Reg<MSTCTL_SPEC>`"]
pub type MSTCTL = crate::Reg<mstctl::MSTCTL_SPEC>;
#[doc = "Master control register."]
pub mod mstctl;
#[doc = "MSTTIME register accessor: an alias for `Reg<MSTTIME_SPEC>`"]
pub type MSTTIME = crate::Reg<msttime::MSTTIME_SPEC>;
#[doc = "Master timing configuration."]
pub mod msttime;
#[doc = "MSTDAT register accessor: an alias for `Reg<MSTDAT_SPEC>`"]
pub type MSTDAT = crate::Reg<mstdat::MSTDAT_SPEC>;
#[doc = "Combined Master receiver and transmitter data register."]
pub mod mstdat;
#[doc = "SLVCTL register accessor: an alias for `Reg<SLVCTL_SPEC>`"]
pub type SLVCTL = crate::Reg<slvctl::SLVCTL_SPEC>;
#[doc = "Slave control register."]
pub mod slvctl;
#[doc = "SLVDAT register accessor: an alias for `Reg<SLVDAT_SPEC>`"]
pub type SLVDAT = crate::Reg<slvdat::SLVDAT_SPEC>;
#[doc = "Combined Slave receiver and transmitter data register."]
pub mod slvdat;
#[doc = "SLVADR register accessor: an alias for `Reg<SLVADR_SPEC>`"]
pub type SLVADR = crate::Reg<slvadr::SLVADR_SPEC>;
#[doc = "Slave address register."]
pub mod slvadr;
#[doc = "SLVQUAL0 register accessor: an alias for `Reg<SLVQUAL0_SPEC>`"]
pub type SLVQUAL0 = crate::Reg<slvqual0::SLVQUAL0_SPEC>;
#[doc = "Slave Qualification for address 0."]
pub mod slvqual0;
#[doc = "MONRXDAT register accessor: an alias for `Reg<MONRXDAT_SPEC>`"]
pub type MONRXDAT = crate::Reg<monrxdat::MONRXDAT_SPEC>;
#[doc = "Monitor receiver data register."]
pub mod monrxdat;