Struct lpc845_pac::dma0::enableclr0::W [−][src]
pub struct W(_);
Expand description
Register ENABLECLR0
writer
Implementations
Bits 0:24 - Writing ones to this register clears the corresponding bits in ENABLESET0. Bit n clears the channel enable bit n. The number of bits = number of DMA channels in this device. Other bits are reserved.
Methods from Deref<Target = W<ENABLECLR0_SPEC>>
Trait Implementations
Performs the conversion.