Struct lpc845_pac::capt::poll_tcnt::RDELAY_W [−][src]
pub struct RDELAY_W<'a> { /* fields omitted */ }
Expand description
Field RDELAY
writer - If not 0, this is the number of divided FCLKs to hold in Step 0 ‘Reset’ state (draining capacitance). It is used as (1 is smaller than RDELAY), so between 2 and 8 ticks of the divided FCLK added to the ‘Reset’ state.