Struct lpc82x_pac::usart0::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {
pub cfg: Reg<CFG_SPEC>,
pub ctl: Reg<CTL_SPEC>,
pub stat: Reg<STAT_SPEC>,
pub intenset: Reg<INTENSET_SPEC>,
pub intenclr: Reg<INTENCLR_SPEC>,
pub rxdat: Reg<RXDAT_SPEC>,
pub rxdatstat: Reg<RXDATSTAT_SPEC>,
pub txdat: Reg<TXDAT_SPEC>,
pub brg: Reg<BRG_SPEC>,
pub intstat: Reg<INTSTAT_SPEC>,
pub osr: Reg<OSR_SPEC>,
pub addr: Reg<ADDR_SPEC>,
}
Expand description
Register block
Fields
cfg: Reg<CFG_SPEC>
0x00 - USART Configuration register. Basic USART configuration settings that typically are not changed during operation.
ctl: Reg<CTL_SPEC>
0x04 - USART Control register. USART control settings that are more likely to change during operation.
stat: Reg<STAT_SPEC>
0x08 - USART Status register. The complete status value can be read here. Writing ones clears some bits in the register. Some bits can be cleared by writing a 1 to them.
intenset: Reg<INTENSET_SPEC>
0x0c - Interrupt Enable read and Set register. Contains an individual interrupt enable bit for each potential USART interrupt. A complete value may be read from this register. Writing a 1 to any implemented bit position causes that bit to be set.
intenclr: Reg<INTENCLR_SPEC>
0x10 - Interrupt Enable Clear register. Allows clearing any combination of bits in the INTENSET register. Writing a 1 to any implemented bit position causes the corresponding bit to be cleared.
rxdat: Reg<RXDAT_SPEC>
0x14 - Receiver Data register. Contains the last character received.
rxdatstat: Reg<RXDATSTAT_SPEC>
0x18 - Receiver Data with Status register. Combines the last character received with the current USART receive status. Allows DMA or software to recover incoming data and status together.
txdat: Reg<TXDAT_SPEC>
0x1c - Transmit Data register. Data to be transmitted is written here.
brg: Reg<BRG_SPEC>
0x20 - Baud Rate Generator register. 16-bit integer baud rate divisor value.
intstat: Reg<INTSTAT_SPEC>
0x24 - Interrupt status register. Reflects interrupts that are currently enabled.
osr: Reg<OSR_SPEC>
0x28 - Oversample selection register for asynchronous communication.
addr: Reg<ADDR_SPEC>
0x2c - Address register for automatic address matching.