Type Definition lpc81x_pac::FieldWriter
source · pub type FieldWriter<'a, U, REG, N, FI, const WI: u8, const O: u8> = FieldWriterRaw<'a, U, REG, N, FI, Unsafe, WI, O>;
Expand description
Write field Proxy with unsafe bits
Implementations§
source§impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF>where
REG: Writable + RegisterSpec<Ux = U>,
FI: Into<N>,
impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF>where
REG: Writable + RegisterSpec<Ux = U>,
FI: Into<N>,
source§impl<'a, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, u8, REG, N, FI, WI, OF>where
REG: Writable + RegisterSpec<Ux = u8>,
N: Into<u8>,
FI: Into<N>,
impl<'a, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, u8, REG, N, FI, WI, OF>where
REG: Writable + RegisterSpec<Ux = u8>,
N: Into<u8>,
FI: Into<N>,
source§impl<'a, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, u32, REG, N, FI, WI, OF>where
REG: Writable + RegisterSpec<Ux = u32>,
N: Into<u32>,
FI: Into<N>,
impl<'a, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, u32, REG, N, FI, WI, OF>where
REG: Writable + RegisterSpec<Ux = u32>,
N: Into<u32>,
FI: Into<N>,
sourcepub unsafe fn bits(self, value: N) -> &'a mut REG::Writer
pub unsafe fn bits(self, value: N) -> &'a mut REG::Writer
Writes raw bits to the field
Safety
Passing incorrect value can cause undefined behaviour. See reference manual
sourcepub fn variant(self, variant: FI) -> &'a mut REG::Writer
pub fn variant(self, variant: FI) -> &'a mut REG::Writer
Writes variant
to the field
Examples found in repository?
src/lpc810/syscon/syspllclksel.rs (line 89)
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pub fn irc(self) -> &'a mut W {
self.variant(SEL_A::IRC)
}
#[doc = "Crystal Oscillator (SYSOSC)"]
#[inline(always)]
pub fn sysosc(self) -> &'a mut W {
self.variant(SEL_A::SYSOSC)
}
#[doc = "CLKIN. External clock input."]
#[inline(always)]
pub fn clkin(self) -> &'a mut W {
self.variant(SEL_A::CLKIN)
}
More examples
src/lpc811/syscon/syspllclksel.rs (line 89)
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pub fn irc(self) -> &'a mut W {
self.variant(SEL_A::IRC)
}
#[doc = "Crystal Oscillator (SYSOSC)"]
#[inline(always)]
pub fn sysosc(self) -> &'a mut W {
self.variant(SEL_A::SYSOSC)
}
#[doc = "CLKIN. External clock input."]
#[inline(always)]
pub fn clkin(self) -> &'a mut W {
self.variant(SEL_A::CLKIN)
}
src/lpc812/syscon/syspllclksel.rs (line 89)
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pub fn irc(self) -> &'a mut W {
self.variant(SEL_A::IRC)
}
#[doc = "Crystal Oscillator (SYSOSC)"]
#[inline(always)]
pub fn sysosc(self) -> &'a mut W {
self.variant(SEL_A::SYSOSC)
}
#[doc = "CLKIN. External clock input."]
#[inline(always)]
pub fn clkin(self) -> &'a mut W {
self.variant(SEL_A::CLKIN)
}
src/lpc810/pmu/pcon.rs (line 97)
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pub fn default(self) -> &'a mut W {
self.variant(PM_A::DEFAULT)
}
#[doc = "Deep-sleep mode. ARM WFI will enter Deep-sleep mode."]
#[inline(always)]
pub fn deep_sleep_mode(self) -> &'a mut W {
self.variant(PM_A::DEEP_SLEEP_MODE)
}
#[doc = "Power-down mode. ARM WFI will enter Power-down mode."]
#[inline(always)]
pub fn power_down_mode(self) -> &'a mut W {
self.variant(PM_A::POWER_DOWN_MODE)
}
#[doc = "Deep power-down mode. ARM WFI will enter Deep-power down mode (ARM Cortex-M0+ core powered-down)."]
#[inline(always)]
pub fn deep_power_down_mode(self) -> &'a mut W {
self.variant(PM_A::DEEP_POWER_DOWN_MODE)
}
src/lpc811/pmu/pcon.rs (line 97)
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pub fn default(self) -> &'a mut W {
self.variant(PM_A::DEFAULT)
}
#[doc = "Deep-sleep mode. ARM WFI will enter Deep-sleep mode."]
#[inline(always)]
pub fn deep_sleep_mode(self) -> &'a mut W {
self.variant(PM_A::DEEP_SLEEP_MODE)
}
#[doc = "Power-down mode. ARM WFI will enter Power-down mode."]
#[inline(always)]
pub fn power_down_mode(self) -> &'a mut W {
self.variant(PM_A::POWER_DOWN_MODE)
}
#[doc = "Deep power-down mode. ARM WFI will enter Deep-power down mode (ARM Cortex-M0+ core powered-down)."]
#[inline(always)]
pub fn deep_power_down_mode(self) -> &'a mut W {
self.variant(PM_A::DEEP_POWER_DOWN_MODE)
}
src/lpc812/pmu/pcon.rs (line 97)
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pub fn default(self) -> &'a mut W {
self.variant(PM_A::DEFAULT)
}
#[doc = "Deep-sleep mode. ARM WFI will enter Deep-sleep mode."]
#[inline(always)]
pub fn deep_sleep_mode(self) -> &'a mut W {
self.variant(PM_A::DEEP_SLEEP_MODE)
}
#[doc = "Power-down mode. ARM WFI will enter Power-down mode."]
#[inline(always)]
pub fn power_down_mode(self) -> &'a mut W {
self.variant(PM_A::POWER_DOWN_MODE)
}
#[doc = "Deep power-down mode. ARM WFI will enter Deep-power down mode (ARM Cortex-M0+ core powered-down)."]
#[inline(always)]
pub fn deep_power_down_mode(self) -> &'a mut W {
self.variant(PM_A::DEEP_POWER_DOWN_MODE)
}
Additional examples can be found in:
- src/lpc810/usart0/cfg.rs
- src/lpc811/usart0/cfg.rs
- src/lpc812/usart0/cfg.rs
- src/lpc810/syscon/bodctrl.rs
- src/lpc811/syscon/bodctrl.rs
- src/lpc812/syscon/bodctrl.rs
- src/lpc810/iocon/pio0_0.rs
- src/lpc810/iocon/pio0_1.rs
- src/lpc810/iocon/pio0_12.rs
- src/lpc810/iocon/pio0_13.rs
- src/lpc810/iocon/pio0_14.rs
- src/lpc810/iocon/pio0_15.rs
- src/lpc810/iocon/pio0_16.rs
- src/lpc810/iocon/pio0_17.rs
- src/lpc810/iocon/pio0_2.rs
- src/lpc810/iocon/pio0_3.rs
- src/lpc810/iocon/pio0_4.rs
- src/lpc810/iocon/pio0_5.rs
- src/lpc810/iocon/pio0_6.rs
- src/lpc810/iocon/pio0_7.rs
- src/lpc810/iocon/pio0_8.rs
- src/lpc810/iocon/pio0_9.rs
- src/lpc811/iocon/pio0_0.rs
- src/lpc811/iocon/pio0_1.rs
- src/lpc811/iocon/pio0_12.rs
- src/lpc811/iocon/pio0_13.rs
- src/lpc811/iocon/pio0_14.rs
- src/lpc811/iocon/pio0_15.rs
- src/lpc811/iocon/pio0_16.rs
- src/lpc811/iocon/pio0_17.rs
- src/lpc811/iocon/pio0_2.rs
- src/lpc811/iocon/pio0_3.rs
- src/lpc811/iocon/pio0_4.rs
- src/lpc811/iocon/pio0_5.rs
- src/lpc811/iocon/pio0_6.rs
- src/lpc811/iocon/pio0_7.rs
- src/lpc811/iocon/pio0_8.rs
- src/lpc811/iocon/pio0_9.rs
- src/lpc812/iocon/pio0_0.rs
- src/lpc812/iocon/pio0_1.rs
- src/lpc812/iocon/pio0_12.rs
- src/lpc812/iocon/pio0_13.rs
- src/lpc812/iocon/pio0_14.rs
- src/lpc812/iocon/pio0_15.rs
- src/lpc812/iocon/pio0_16.rs
- src/lpc812/iocon/pio0_17.rs
- src/lpc812/iocon/pio0_2.rs
- src/lpc812/iocon/pio0_3.rs
- src/lpc812/iocon/pio0_4.rs
- src/lpc812/iocon/pio0_5.rs
- src/lpc812/iocon/pio0_6.rs
- src/lpc812/iocon/pio0_7.rs
- src/lpc812/iocon/pio0_8.rs
- src/lpc812/iocon/pio0_9.rs
- src/lpc810/sct0/outputdirctrl.rs
- src/lpc811/sct0/outputdirctrl.rs
- src/lpc812/sct0/outputdirctrl.rs
- src/lpc810/iocon/pio0_10.rs
- src/lpc810/iocon/pio0_11.rs
- src/lpc811/iocon/pio0_10.rs
- src/lpc811/iocon/pio0_11.rs
- src/lpc812/iocon/pio0_10.rs
- src/lpc812/iocon/pio0_11.rs
- src/lpc810/syscon/sysmemremap.rs
- src/lpc811/syscon/sysmemremap.rs
- src/lpc812/syscon/sysmemremap.rs
- src/lpc810/sct0/config.rs
- src/lpc811/sct0/config.rs
- src/lpc812/sct0/config.rs
- src/lpc810/mrt0/channel/ctrl.rs
- src/lpc811/mrt0/channel/ctrl.rs
- src/lpc812/mrt0/channel/ctrl.rs
- src/lpc810/sct0/ev/ev_ctrl.rs
- src/lpc811/sct0/ev/ev_ctrl.rs
- src/lpc812/sct0/ev/ev_ctrl.rs
- src/lpc810/flash_ctrl/flashcfg.rs
- src/lpc811/flash_ctrl/flashcfg.rs
- src/lpc812/flash_ctrl/flashcfg.rs