#[repr(u8)]
pub enum CKSEL_A {
INPUT_0_RISING_EDGES,
INPUT_0_FALLING_EDGE,
INPUT_1_RISING_EDGES,
INPUT_1_FALLING_EDGE,
INPUT_2_RISING_EDGES,
INPUT_2_FALLING_EDGE,
INPUT_3_RISING_EDGES,
INPUT_3_FALLING_EDGE,
}
Expand description
SCT clock select. The specific functionality of the designated input/edge is dependent on the CLKMODE bit selection in this register.
Value on reset: 0
Variants§
INPUT_0_RISING_EDGES
0: Rising edges on input 0.
INPUT_0_FALLING_EDGE
1: Falling edges on input 0.
INPUT_1_RISING_EDGES
2: Rising edges on input 1.
INPUT_1_FALLING_EDGE
3: Falling edges on input 1.
INPUT_2_RISING_EDGES
4: Rising edges on input 2.
INPUT_2_FALLING_EDGE
5: Falling edges on input 2.
INPUT_3_RISING_EDGES
6: Rising edges on input 3.
INPUT_3_FALLING_EDGE
7: Falling edges on input 3.