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#[doc = "Reader of register CTRL"] pub type R = crate::R<u32, super::CTRL>; #[doc = "Writer for register CTRL"] pub type W = crate::W<u32, super::CTRL>; #[doc = "Register CTRL `reset()`'s with value 0"] impl crate::ResetValue for super::CTRL { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Group interrupt status. This bit is cleared by writing a one to it. Writing zero has no effect.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum INT_A { #[doc = "0: No request. No interrupt request is pending."] NO_REQUEST = 0, #[doc = "1: Request active. Interrupt request is active."] REQUEST_ACTIVE = 1, } impl From<INT_A> for bool { #[inline(always)] fn from(variant: INT_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `INT`"] pub type INT_R = crate::R<bool, INT_A>; impl INT_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> INT_A { match self.bits { false => INT_A::NO_REQUEST, true => INT_A::REQUEST_ACTIVE, } } #[doc = "Checks if the value of the field is `NO_REQUEST`"] #[inline(always)] pub fn is_no_request(&self) -> bool { *self == INT_A::NO_REQUEST } #[doc = "Checks if the value of the field is `REQUEST_ACTIVE`"] #[inline(always)] pub fn is_request_active(&self) -> bool { *self == INT_A::REQUEST_ACTIVE } } #[doc = "Write proxy for field `INT`"] pub struct INT_W<'a> { w: &'a mut W, } impl<'a> INT_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: INT_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "No request. No interrupt request is pending."] #[inline(always)] pub fn no_request(self) -> &'a mut W { self.variant(INT_A::NO_REQUEST) } #[doc = "Request active. Interrupt request is active."] #[inline(always)] pub fn request_active(self) -> &'a mut W { self.variant(INT_A::REQUEST_ACTIVE) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Combine enabled inputs for group interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum COMB_A { #[doc = "0: Or. OR functionality: A grouped interrupt is generated when any one of the enabled inputs is active (based on its programmed polarity)."] OR = 0, #[doc = "1: And. AND functionality: An interrupt is generated when all enabled bits are active (based on their programmed polarity)."] AND = 1, } impl From<COMB_A> for bool { #[inline(always)] fn from(variant: COMB_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `COMB`"] pub type COMB_R = crate::R<bool, COMB_A>; impl COMB_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> COMB_A { match self.bits { false => COMB_A::OR, true => COMB_A::AND, } } #[doc = "Checks if the value of the field is `OR`"] #[inline(always)] pub fn is_or(&self) -> bool { *self == COMB_A::OR } #[doc = "Checks if the value of the field is `AND`"] #[inline(always)] pub fn is_and(&self) -> bool { *self == COMB_A::AND } } #[doc = "Write proxy for field `COMB`"] pub struct COMB_W<'a> { w: &'a mut W, } impl<'a> COMB_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: COMB_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Or. OR functionality: A grouped interrupt is generated when any one of the enabled inputs is active (based on its programmed polarity)."] #[inline(always)] pub fn or(self) -> &'a mut W { self.variant(COMB_A::OR) } #[doc = "And. AND functionality: An interrupt is generated when all enabled bits are active (based on their programmed polarity)."] #[inline(always)] pub fn and(self) -> &'a mut W { self.variant(COMB_A::AND) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Group interrupt trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum TRIG_A { #[doc = "0: Edge-triggered."] EDGE_TRIGGERED = 0, #[doc = "1: Level-triggered."] LEVEL_TRIGGERED = 1, } impl From<TRIG_A> for bool { #[inline(always)] fn from(variant: TRIG_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `TRIG`"] pub type TRIG_R = crate::R<bool, TRIG_A>; impl TRIG_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> TRIG_A { match self.bits { false => TRIG_A::EDGE_TRIGGERED, true => TRIG_A::LEVEL_TRIGGERED, } } #[doc = "Checks if the value of the field is `EDGE_TRIGGERED`"] #[inline(always)] pub fn is_edge_triggered(&self) -> bool { *self == TRIG_A::EDGE_TRIGGERED } #[doc = "Checks if the value of the field is `LEVEL_TRIGGERED`"] #[inline(always)] pub fn is_level_triggered(&self) -> bool { *self == TRIG_A::LEVEL_TRIGGERED } } #[doc = "Write proxy for field `TRIG`"] pub struct TRIG_W<'a> { w: &'a mut W, } impl<'a> TRIG_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TRIG_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Edge-triggered."] #[inline(always)] pub fn edge_triggered(self) -> &'a mut W { self.variant(TRIG_A::EDGE_TRIGGERED) } #[doc = "Level-triggered."] #[inline(always)] pub fn level_triggered(self) -> &'a mut W { self.variant(TRIG_A::LEVEL_TRIGGERED) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } impl R { #[doc = "Bit 0 - Group interrupt status. This bit is cleared by writing a one to it. Writing zero has no effect."] #[inline(always)] pub fn int(&self) -> INT_R { INT_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Combine enabled inputs for group interrupt"] #[inline(always)] pub fn comb(&self) -> COMB_R { COMB_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Group interrupt trigger"] #[inline(always)] pub fn trig(&self) -> TRIG_R { TRIG_R::new(((self.bits >> 2) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Group interrupt status. This bit is cleared by writing a one to it. Writing zero has no effect."] #[inline(always)] pub fn int(&mut self) -> INT_W { INT_W { w: self } } #[doc = "Bit 1 - Combine enabled inputs for group interrupt"] #[inline(always)] pub fn comb(&mut self) -> COMB_W { COMB_W { w: self } } #[doc = "Bit 2 - Group interrupt trigger"] #[inline(always)] pub fn trig(&mut self) -> TRIG_W { TRIG_W { w: self } } }