lpc55s6x_pac/gint0/
ctrl.rs1#[doc = "Reader of register CTRL"]
2pub type R = crate::R<u32, super::CTRL>;
3#[doc = "Writer for register CTRL"]
4pub type W = crate::W<u32, super::CTRL>;
5#[doc = "Register CTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::CTRL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Group interrupt status. This bit is cleared by writing a one to it. Writing zero has no effect.\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum INT_A {
16 #[doc = "0: No request. No interrupt request is pending."]
17 NO_REQUEST = 0,
18 #[doc = "1: Request active. Interrupt request is active."]
19 REQUEST_ACTIVE = 1,
20}
21impl From<INT_A> for bool {
22 #[inline(always)]
23 fn from(variant: INT_A) -> Self {
24 variant as u8 != 0
25 }
26}
27#[doc = "Reader of field `INT`"]
28pub type INT_R = crate::R<bool, INT_A>;
29impl INT_R {
30 #[doc = r"Get enumerated values variant"]
31 #[inline(always)]
32 pub fn variant(&self) -> INT_A {
33 match self.bits {
34 false => INT_A::NO_REQUEST,
35 true => INT_A::REQUEST_ACTIVE,
36 }
37 }
38 #[doc = "Checks if the value of the field is `NO_REQUEST`"]
39 #[inline(always)]
40 pub fn is_no_request(&self) -> bool {
41 *self == INT_A::NO_REQUEST
42 }
43 #[doc = "Checks if the value of the field is `REQUEST_ACTIVE`"]
44 #[inline(always)]
45 pub fn is_request_active(&self) -> bool {
46 *self == INT_A::REQUEST_ACTIVE
47 }
48}
49#[doc = "Write proxy for field `INT`"]
50pub struct INT_W<'a> {
51 w: &'a mut W,
52}
53impl<'a> INT_W<'a> {
54 #[doc = r"Writes `variant` to the field"]
55 #[inline(always)]
56 pub fn variant(self, variant: INT_A) -> &'a mut W {
57 {
58 self.bit(variant.into())
59 }
60 }
61 #[doc = "No request. No interrupt request is pending."]
62 #[inline(always)]
63 pub fn no_request(self) -> &'a mut W {
64 self.variant(INT_A::NO_REQUEST)
65 }
66 #[doc = "Request active. Interrupt request is active."]
67 #[inline(always)]
68 pub fn request_active(self) -> &'a mut W {
69 self.variant(INT_A::REQUEST_ACTIVE)
70 }
71 #[doc = r"Sets the field bit"]
72 #[inline(always)]
73 pub fn set_bit(self) -> &'a mut W {
74 self.bit(true)
75 }
76 #[doc = r"Clears the field bit"]
77 #[inline(always)]
78 pub fn clear_bit(self) -> &'a mut W {
79 self.bit(false)
80 }
81 #[doc = r"Writes raw bits to the field"]
82 #[inline(always)]
83 pub fn bit(self, value: bool) -> &'a mut W {
84 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
85 self.w
86 }
87}
88#[doc = "Combine enabled inputs for group interrupt\n\nValue on reset: 0"]
89#[derive(Clone, Copy, Debug, PartialEq)]
90pub enum COMB_A {
91 #[doc = "0: Or. OR functionality: A grouped interrupt is generated when any one of the enabled inputs is active (based on its programmed polarity)."]
92 OR = 0,
93 #[doc = "1: And. AND functionality: An interrupt is generated when all enabled bits are active (based on their programmed polarity)."]
94 AND = 1,
95}
96impl From<COMB_A> for bool {
97 #[inline(always)]
98 fn from(variant: COMB_A) -> Self {
99 variant as u8 != 0
100 }
101}
102#[doc = "Reader of field `COMB`"]
103pub type COMB_R = crate::R<bool, COMB_A>;
104impl COMB_R {
105 #[doc = r"Get enumerated values variant"]
106 #[inline(always)]
107 pub fn variant(&self) -> COMB_A {
108 match self.bits {
109 false => COMB_A::OR,
110 true => COMB_A::AND,
111 }
112 }
113 #[doc = "Checks if the value of the field is `OR`"]
114 #[inline(always)]
115 pub fn is_or(&self) -> bool {
116 *self == COMB_A::OR
117 }
118 #[doc = "Checks if the value of the field is `AND`"]
119 #[inline(always)]
120 pub fn is_and(&self) -> bool {
121 *self == COMB_A::AND
122 }
123}
124#[doc = "Write proxy for field `COMB`"]
125pub struct COMB_W<'a> {
126 w: &'a mut W,
127}
128impl<'a> COMB_W<'a> {
129 #[doc = r"Writes `variant` to the field"]
130 #[inline(always)]
131 pub fn variant(self, variant: COMB_A) -> &'a mut W {
132 {
133 self.bit(variant.into())
134 }
135 }
136 #[doc = "Or. OR functionality: A grouped interrupt is generated when any one of the enabled inputs is active (based on its programmed polarity)."]
137 #[inline(always)]
138 pub fn or(self) -> &'a mut W {
139 self.variant(COMB_A::OR)
140 }
141 #[doc = "And. AND functionality: An interrupt is generated when all enabled bits are active (based on their programmed polarity)."]
142 #[inline(always)]
143 pub fn and(self) -> &'a mut W {
144 self.variant(COMB_A::AND)
145 }
146 #[doc = r"Sets the field bit"]
147 #[inline(always)]
148 pub fn set_bit(self) -> &'a mut W {
149 self.bit(true)
150 }
151 #[doc = r"Clears the field bit"]
152 #[inline(always)]
153 pub fn clear_bit(self) -> &'a mut W {
154 self.bit(false)
155 }
156 #[doc = r"Writes raw bits to the field"]
157 #[inline(always)]
158 pub fn bit(self, value: bool) -> &'a mut W {
159 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
160 self.w
161 }
162}
163#[doc = "Group interrupt trigger\n\nValue on reset: 0"]
164#[derive(Clone, Copy, Debug, PartialEq)]
165pub enum TRIG_A {
166 #[doc = "0: Edge-triggered."]
167 EDGE_TRIGGERED = 0,
168 #[doc = "1: Level-triggered."]
169 LEVEL_TRIGGERED = 1,
170}
171impl From<TRIG_A> for bool {
172 #[inline(always)]
173 fn from(variant: TRIG_A) -> Self {
174 variant as u8 != 0
175 }
176}
177#[doc = "Reader of field `TRIG`"]
178pub type TRIG_R = crate::R<bool, TRIG_A>;
179impl TRIG_R {
180 #[doc = r"Get enumerated values variant"]
181 #[inline(always)]
182 pub fn variant(&self) -> TRIG_A {
183 match self.bits {
184 false => TRIG_A::EDGE_TRIGGERED,
185 true => TRIG_A::LEVEL_TRIGGERED,
186 }
187 }
188 #[doc = "Checks if the value of the field is `EDGE_TRIGGERED`"]
189 #[inline(always)]
190 pub fn is_edge_triggered(&self) -> bool {
191 *self == TRIG_A::EDGE_TRIGGERED
192 }
193 #[doc = "Checks if the value of the field is `LEVEL_TRIGGERED`"]
194 #[inline(always)]
195 pub fn is_level_triggered(&self) -> bool {
196 *self == TRIG_A::LEVEL_TRIGGERED
197 }
198}
199#[doc = "Write proxy for field `TRIG`"]
200pub struct TRIG_W<'a> {
201 w: &'a mut W,
202}
203impl<'a> TRIG_W<'a> {
204 #[doc = r"Writes `variant` to the field"]
205 #[inline(always)]
206 pub fn variant(self, variant: TRIG_A) -> &'a mut W {
207 {
208 self.bit(variant.into())
209 }
210 }
211 #[doc = "Edge-triggered."]
212 #[inline(always)]
213 pub fn edge_triggered(self) -> &'a mut W {
214 self.variant(TRIG_A::EDGE_TRIGGERED)
215 }
216 #[doc = "Level-triggered."]
217 #[inline(always)]
218 pub fn level_triggered(self) -> &'a mut W {
219 self.variant(TRIG_A::LEVEL_TRIGGERED)
220 }
221 #[doc = r"Sets the field bit"]
222 #[inline(always)]
223 pub fn set_bit(self) -> &'a mut W {
224 self.bit(true)
225 }
226 #[doc = r"Clears the field bit"]
227 #[inline(always)]
228 pub fn clear_bit(self) -> &'a mut W {
229 self.bit(false)
230 }
231 #[doc = r"Writes raw bits to the field"]
232 #[inline(always)]
233 pub fn bit(self, value: bool) -> &'a mut W {
234 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
235 self.w
236 }
237}
238impl R {
239 #[doc = "Bit 0 - Group interrupt status. This bit is cleared by writing a one to it. Writing zero has no effect."]
240 #[inline(always)]
241 pub fn int(&self) -> INT_R {
242 INT_R::new((self.bits & 0x01) != 0)
243 }
244 #[doc = "Bit 1 - Combine enabled inputs for group interrupt"]
245 #[inline(always)]
246 pub fn comb(&self) -> COMB_R {
247 COMB_R::new(((self.bits >> 1) & 0x01) != 0)
248 }
249 #[doc = "Bit 2 - Group interrupt trigger"]
250 #[inline(always)]
251 pub fn trig(&self) -> TRIG_R {
252 TRIG_R::new(((self.bits >> 2) & 0x01) != 0)
253 }
254}
255impl W {
256 #[doc = "Bit 0 - Group interrupt status. This bit is cleared by writing a one to it. Writing zero has no effect."]
257 #[inline(always)]
258 pub fn int(&mut self) -> INT_W {
259 INT_W { w: self }
260 }
261 #[doc = "Bit 1 - Combine enabled inputs for group interrupt"]
262 #[inline(always)]
263 pub fn comb(&mut self) -> COMB_W {
264 COMB_W { w: self }
265 }
266 #[doc = "Bit 2 - Group interrupt trigger"]
267 #[inline(always)]
268 pub fn trig(&mut self) -> TRIG_W {
269 TRIG_W { w: self }
270 }
271}