[−][src]Type Definition lpc55s6x_pac::syscon::FCCLKSEL4
type FCCLKSEL4 = Reg<u32, _FCCLKSEL4>;
Flexcomm Interface 4 clock source select for Fractional Rate Divider
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about avaliable fields see fcclksel4 module
Trait Implementations
impl Readable for FCCLKSEL4
[src]
read()
method returns fcclksel4::R reader structure
impl Writable for FCCLKSEL4
[src]
write(|w| ..)
method takes fcclksel4::W writer structure
impl ResetValue for FCCLKSEL4
[src]
Register FCCLKSEL4 reset()
's with value 0x07