[−][src]Type Definition lpc55s6x_pac::usbphy::pll_sic_tog::R
type R = R<u32, PLL_SIC_TOG>;
Reader of register PLL_SIC_TOG
Methods
impl R
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pub fn misc2_control0(&self) -> MISC2_CONTROL0_R
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Bit 5 - Modifies the operation of the pll_sic_power_int signal
pub fn pll_en_usb_clks(&self) -> PLL_EN_USB_CLKS_R
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Bit 6 - Enables the USB clock from PLL to USB PHY
pub fn pll_power(&self) -> PLL_POWER_R
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Bit 12 - Power up the USB PLL
pub fn pll_enable(&self) -> PLL_ENABLE_R
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Bit 13 - Enables the clock output from the USB PLL
pub fn pll_bypass(&self) -> PLL_BYPASS_R
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Bit 16 - Bypass the USB PLL.
pub fn refbias_pwd_sel(&self) -> REFBIAS_PWD_SEL_R
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Bit 19 - Reference bias power down select.
pub fn refbias_pwd(&self) -> REFBIAS_PWD_R
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Bit 20 - Power down the reference bias This bit is only used when REFBIAS_PWD_SEL is set to 1.
pub fn pll_reg_enable(&self) -> PLL_REG_ENABLE_R
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Bit 21 - This field controls the USB PLL regulator, set to enable the regulator
pub fn pll_div_sel(&self) -> PLL_DIV_SEL_R
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Bits 22:24 - This field controls the USB PLL feedback loop divider
pub fn pll_lock(&self) -> PLL_LOCK_R
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Bit 31 - USB PLL lock status indicator