Struct lpc55_pac::spi0::fifowr::W

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pub struct W(_);

Expand description

Register FIFOWR writer

Implementations

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impl W

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pub fn txdata(&mut self) -> TXDATA_W<'_>

Bits 0:15 - Transmit data to the FIFO.

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pub fn txssel0_n(&mut self) -> TXSSEL0_N_W<'_>

Bit 16 - Transmit slave select. This field asserts SSEL0 in master mode. The output on the pin is active LOW by default.

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pub fn txssel1_n(&mut self) -> TXSSEL1_N_W<'_>

Bit 17 - Transmit slave select. This field asserts SSEL1 in master mode. The output on the pin is active LOW by default.

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pub fn txssel2_n(&mut self) -> TXSSEL2_N_W<'_>

Bit 18 - Transmit slave select. This field asserts SSEL2 in master mode. The output on the pin is active LOW by default.

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pub fn txssel3_n(&mut self) -> TXSSEL3_N_W<'_>

Bit 19 - Transmit slave select. This field asserts SSEL3 in master mode. The output on the pin is active LOW by default.

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pub fn eot(&mut self) -> EOT_W<'_>

Bit 20 - End of transfer. The asserted SSEL will be deasserted at the end of a transfer and remain so far at least the time specified by the Transfer_delay value in the DLY register.

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pub fn eof(&mut self) -> EOF_W<'_>

Bit 21 - End of frame. Between frames, a delay may be inserted, as defined by the Frame_delay value in the DLY register. The end of a frame may not be particularly meaningful if the Frame_delay value = 0. This control can be used as part of the support for frame lengths greater than 16 bits.

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pub fn rxignore(&mut self) -> RXIGNORE_W<'_>

Bit 22 - Receive Ignore. This allows data to be transmitted using the SPI without the need to read unneeded data from the receiver. Setting this bit simplifies the transmit process and can be used with the DMA.

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pub fn len(&mut self) -> LEN_W<'_>

Bits 24:27 - Data Length. Specifies the data length from 4 to 16 bits. Note that transfer lengths greater than 16 bits are supported by implementing multiple sequential transmits. 0x0-2 = Reserved. 0x3 = Data transfer is 4 bits in length. 0x4 = Data transfer is 5 bits in length. 0xF = Data transfer is 16 bits in length.

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