#[repr(C)]pub struct RegisterBlock {
pub resetctrl: Reg<RESETCTRL_SPEC>,
pub bodvbat: Reg<BODVBAT_SPEC>,
pub comp: Reg<COMP_SPEC>,
pub wakeiocause: Reg<WAKEIOCAUSE_SPEC>,
pub statusclk: Reg<STATUSCLK_SPEC>,
pub aoreg1: Reg<AOREG1_SPEC>,
pub rtcosc32k: Reg<RTCOSC32K_SPEC>,
pub ostimer: Reg<OSTIMER_SPEC>,
pub pdruncfg0: Reg<PDRUNCFG0_SPEC>,
pub pdruncfgset0: Reg<PDRUNCFGSET0_SPEC>,
pub pdruncfgclr0: Reg<PDRUNCFGCLR0_SPEC>,
/* private fields */
}Expand description
Register block
Fields§
§resetctrl: Reg<RESETCTRL_SPEC>0x08 - Reset Control [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
bodvbat: Reg<BODVBAT_SPEC>0x30 - VBAT Brown Out Dectector (BoD) control register [Reset by: PoR, Pin Reset, Software Reset]
comp: Reg<COMP_SPEC>0x50 - Analog Comparator control register [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
wakeiocause: Reg<WAKEIOCAUSE_SPEC>0x68 - Allows to identify the Wake-up I/O source from Deep Power Down mode
statusclk: Reg<STATUSCLK_SPEC>0x74 - FRO and XTAL status register [Reset by: PoR, Brown Out Detectors Reset]
aoreg1: Reg<AOREG1_SPEC>0x84 - General purpose always on domain data storage [Reset by: PoR, Brown Out Detectors Reset]
rtcosc32k: Reg<RTCOSC32K_SPEC>0x98 - RTC 1 KHZ and 1 Hz clocks source control register [Reset by: PoR, Brown Out Detectors Reset]
ostimer: Reg<OSTIMER_SPEC>0x9c - OS Timer control register [Reset by: PoR, Brown Out Detectors Reset]
pdruncfg0: Reg<PDRUNCFG0_SPEC>0xb8 - Controls the power to various analog blocks [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
pdruncfgset0: Reg<PDRUNCFGSET0_SPEC>0xc0 - Controls the power to various analog blocks [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]
pdruncfgclr0: Reg<PDRUNCFGCLR0_SPEC>0xc8 - Controls the power to various analog blocks [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]