RegisterBlock

lpc55_pac::flash

Struct RegisterBlock 

Source 
#[repr(C)]
pub struct RegisterBlock {
    pub cmd: Reg<CMD_SPEC>,
    pub event: Reg<EVENT_SPEC>,
    pub starta: Reg<STARTA_SPEC>,
    pub stopa: Reg<STOPA_SPEC>,
    pub dataw: [Reg<DATAW_SPEC>; 4],
    pub int_clr_enable: Reg<INT_CLR_ENABLE_SPEC>,
    pub int_set_enable: Reg<INT_SET_ENABLE_SPEC>,
    pub int_status: Reg<INT_STATUS_SPEC>,
    pub int_enable: Reg<INT_ENABLE_SPEC>,
    pub int_clr_status: Reg<INT_CLR_STATUS_SPEC>,
    pub int_set_status: Reg<INT_SET_STATUS_SPEC>,
    pub module_id: Reg<MODULE_ID_SPEC>,
    /* private fields */
}
Expand description

Register block

Fields§

§cmd: Reg<CMD_SPEC>

0x00 - command register

§event: Reg<EVENT_SPEC>

0x04 - event register

§starta: Reg<STARTA_SPEC>

0x10 - start (or only) address for next flash command

§stopa: Reg<STOPA_SPEC>

0x14 - end address for next flash command, if command operates on address ranges

§dataw: [Reg<DATAW_SPEC>; 4]

0x80..0x90 - data register, word 0-7; Memory data, or command parameter, or command result.

§int_clr_enable: Reg<INT_CLR_ENABLE_SPEC>

0xfd8 - Clear interrupt enable bits

§int_set_enable: Reg<INT_SET_ENABLE_SPEC>

0xfdc - Set interrupt enable bits

§int_status: Reg<INT_STATUS_SPEC>

0xfe0 - Interrupt status bits

§int_enable: Reg<INT_ENABLE_SPEC>

0xfe4 - Interrupt enable bits

§int_clr_status: Reg<INT_CLR_STATUS_SPEC>

0xfe8 - Clear interrupt status bits

§int_set_status: Reg<INT_SET_STATUS_SPEC>

0xfec - Set interrupt status bits

§module_id: Reg<MODULE_ID_SPEC>

0xffc - Controller+Memory module identification

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