RegisterBlock

lpc55_pac::casper

Struct RegisterBlock 

Source 
#[repr(C)]
pub struct RegisterBlock {
Show 18 fields
    pub ctrl0: Reg<CTRL0_SPEC>,
    pub ctrl1: Reg<CTRL1_SPEC>,
    pub loader: Reg<LOADER_SPEC>,
    pub status: Reg<STATUS_SPEC>,
    pub intenset: Reg<INTENSET_SPEC>,
    pub intenclr: Reg<INTENCLR_SPEC>,
    pub intstat: Reg<INTSTAT_SPEC>,
    pub areg: Reg<AREG_SPEC>,
    pub breg: Reg<BREG_SPEC>,
    pub creg: Reg<CREG_SPEC>,
    pub dreg: Reg<DREG_SPEC>,
    pub res0: Reg<RES0_SPEC>,
    pub res1: Reg<RES1_SPEC>,
    pub res2: Reg<RES2_SPEC>,
    pub res3: Reg<RES3_SPEC>,
    pub mask: Reg<MASK_SPEC>,
    pub remask: Reg<REMASK_SPEC>,
    pub lock: Reg<LOCK_SPEC>,
    /* private fields */

}
Expand description

Register block

Fields§

§ctrl0: Reg<CTRL0_SPEC>

0x00 - Contains the offsets of AB and CD in the RAM.

§ctrl1: Reg<CTRL1_SPEC>

0x04 - Contains the opcode mode, iteration count, and result offset (in RAM) and also launches the accelerator. Note: with CP version: CTRL0 and CRTL1 can be written in one go with MCRR.

§loader: Reg<LOADER_SPEC>

0x08 - Contains an optional loader to load into CTRL0/1 in steps to perform a set of operations.

§status: Reg<STATUS_SPEC>

0x0c - Indicates operational status and would contain the carry bit if used.

§intenset: Reg<INTENSET_SPEC>

0x10 - Sets interrupts

§intenclr: Reg<INTENCLR_SPEC>

0x14 - Clears interrupts

§intstat: Reg<INTSTAT_SPEC>

0x18 - Interrupt status bits (mask of INTENSET and STATUS)

§areg: Reg<AREG_SPEC>

0x20 - A register

§breg: Reg<BREG_SPEC>

0x24 - B register

§creg: Reg<CREG_SPEC>

0x28 - C register

§dreg: Reg<DREG_SPEC>

0x2c - D register

§res0: Reg<RES0_SPEC>

0x30 - Result register 0

§res1: Reg<RES1_SPEC>

0x34 - Result register 1

§res2: Reg<RES2_SPEC>

0x38 - Result register 2

§res3: Reg<RES3_SPEC>

0x3c - Result register 3

§mask: Reg<MASK_SPEC>

0x60 - Optional mask register

§remask: Reg<REMASK_SPEC>

0x64 - Optional re-mask register

§lock: Reg<LOCK_SPEC>

0x80 - Security lock register

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